> From: Stefan Markovic <stefan.marko...@rt-rk.com>
> Sent: Thursday, July 19, 2018 2:54 PM
> Subject: [PATCH v3 24/40] target/mips: Add updating BadInstr and BadInstrP
> registers for nanoMIPS
>
> From: Yongbok Kim <yongbok....@mips.com>
>
> Updating BadInstr and BadInstrP registers was addded for nanoMIPS.
> BadInstr and BadInstrP support for pre-nanoMIPS remains
> unimplemented.
>
> Signed-off-by: Yongbok Kim <yongbok....@mips.com>
> Signed-off-by: Aleksandar Markovic <amarko...@wavecomp.com>
> Signed-off-by: Stefan Markovic <smarko...@wavecomp.com>
> ---
> target/mips/helper.c | 23 ++++++++++++++++++++++-
> 1 file changed, 22 insertions(+), 1 deletion(-)
>
> diff --git a/target/mips/helper.c b/target/mips/helper.c
> index e215af9..5299f21 100644
> --- a/target/mips/helper.c
> +++ b/target/mips/helper.c
> @@ -683,7 +683,28 @@ static void set_hflags_for_handler (CPUMIPSState *env)
> static inline void set_badinstr_registers(CPUMIPSState *env)
> {
> if (env->hflags & MIPS_HFLAG_M16) {
> - /* TODO: add BadInstr support for microMIPS */
> + uint32_t instr;
> + if (!(env->insn_flags & ISA_NANOMIPS32)) {
> + /* TODO: add BadInstr support for pre-nanoMIPS */
> + return;
> + }
> + if (env->CP0_Config3 & (1 << CP0C3_BI)) {
> + instr = (cpu_lduw_code(env, env->active_tc.PC)) << 16;
> + if ((env->insn_flags & ISA_NANOMIPS32) &&
> + ((instr & 0x10000000) == 0)) {
> + instr |= cpu_lduw_code(env, env->active_tc.PC + 2);
> + }
> + env->CP0_BadInstr = instr;
> + }
> + if ((env->CP0_Config3 & (1 << CP0C3_BP)) &&
> + (env->hflags & MIPS_HFLAG_BMASK)) {
> + if (!(env->hflags & MIPS_HFLAG_B16)) {
> + env->CP0_BadInstrP = cpu_ldl_code(env, env->active_tc.PC -
> 4);
> + } else {
> + env->CP0_BadInstrP =
> + (cpu_lduw_code(env, env->active_tc.PC - 2)) << 16;
> + }
> + }
> return;
> }
> if (env->CP0_Config3 & (1 << CP0C3_BI)) {
> --
> 2.7.4
This new block should be placed before MIPS_HFLAG_M16 check. The whole patch
should be merged with the succeeding patch, as noted in other reviews.
Aleksandar
