Re: [Qemu-devel] [PATCH v3 24/40] target/mips: Add updating BadInstr and BadInstrP registers for nanoMIPS

[Richard Henderson]

On 07/19/2018 05:54 AM, Stefan Markovic wrote:
> +        if (!(env->insn_flags & ISA_NANOMIPS32)) {
> +            /* TODO: add BadInstr support for pre-nanoMIPS */
> +             return;
> +        }
> +        if (env->CP0_Config3 & (1 << CP0C3_BI)) {
> +            instr = (cpu_lduw_code(env, env->active_tc.PC)) << 16;
> +            if ((env->insn_flags & ISA_NANOMIPS32) &&

Redundant check for nanomips.


r~