From: Edgar E. Iglesias <edgar.igles...@gmail.com>
When reading cp0_count from a timer with a late trigger that should
already have expired, expire it and raise the timer irq.
This makes it possible for guest code (e.g, Linux) that first read
cp0_count, then compare it with cp0_compare and check for raised
timer interrupt lines to run reliably.
Signed-off-by: Edgar E. Iglesias <edgar.igles...@gmail.com>
---
hw/mips_timer.c | 11 +++++++++--
1 files changed, 9 insertions(+), 2 deletions(-)
diff --git a/hw/mips_timer.c b/hw/mips_timer.c
index 8c32087..4e5c0b5 100644
--- a/hw/mips_timer.c
+++ b/hw/mips_timer.c
@@ -69,9 +69,16 @@ uint32_t cpu_mips_get_count (CPUState *env)
if (env->CP0_Cause & (1 << CP0Ca_DC)) {
return env->CP0_Count;
} else {
+ uint64_t now;
+
+ now = qemu_get_clock(vm_clock);
+ if (qemu_timer_expired(env->timer, now)) {
+ /* The timer has already expired. */
+ cpu_mips_timer_expire(env);
+ }
+
return env->CP0_Count +
- (uint32_t)muldiv64(qemu_get_clock(vm_clock),
- TIMER_FREQ, get_ticks_per_sec());
+ (uint32_t)muldiv64(now, TIMER_FREQ, get_ticks_per_sec());
}
}
--
1.7.2.2
