On 16 January 2018 at 01:37, Andrey Smirnov <andrew.smir...@gmail.com> wrote: > Add code needed to get a functional PCI subsytem when using in > conjunction with upstream Linux guest (4.13+). Tested to work against > "e1000e" (network adapter, using MSI interrupts) as well as > "usb-ehci" (USB controller, using legacy PCI interrupts). > > Cc: Peter Maydell <peter.mayd...@linaro.org> > Cc: Jason Wang <jasow...@redhat.com> > Cc: Philippe Mathieu-Daudé <f4...@amsat.org> > Cc: qemu-devel@nongnu.org > Cc: qemu-...@nongnu.org > Cc: yurov...@gmail.com > Signed-off-by: Andrey Smirnov <andrew.smir...@gmail.com> > --- > default-configs/arm-softmmu.mak | 2 + > hw/pci-host/Makefile.objs | 2 + > hw/pci-host/designware.c | 618 > +++++++++++++++++++++++++++++++++++++++ > include/hw/pci-host/designware.h | 93 ++++++ > include/hw/pci/pci_ids.h | 2 + > 5 files changed, 717 insertions(+) > create mode 100644 hw/pci-host/designware.c > create mode 100644 include/hw/pci-host/designware.h
I'm not familiar enough with our PCI code to be able to review this, I'm afraid. MST and Marcel are our PCI subsystem maintainers -- could one of you have a look at whether this seems to be a correct implementation of a pcie host controller ? I did notice it seems to be missing device state save/load support. thanks -- PMM
