Hi Andrey, On Wed, Jan 17, 2018 at 1:12 PM, Andrey Smirnov <andrew.smir...@gmail.com> wrote: > On Wed, Jan 17, 2018 at 7:23 AM, Marcel Apfelbaum > <marcel.apfelb...@zoho.com> wrote: >> That being said, if Andrey can point me to the PCI spec for the Designware >> PCI host bridge and what parts they implemented for it I can have a look, >> sure. >> (I will not be available for a week or so, but right after) >> > > Just in case you still want this: > > To the best of my knowledge, Synposys does not provide specification > for their PCIe IP to general public and I am in no way affiliated with > them, so I don't have any backchannels to get it any other way. > > The next best thing to an actual spec, that I found to be pretty > useful, is PCIe chapter of i.MX6Q Reference Manual > (https://www.nxp.com/docs/en/reference-manual/IMX6DQRM.pdf page > 4049), which is what I used to implement the code in question.
Please add a comment about it in your respin, such: Based on "i.MX6 Applications Processor Reference Manual" (Document Number: IMX6DQRM Rev. 4) > Last, and probably the most important, "source of truth" was actual > Linux PCIe driver for i.MX/Designware which I used as a sort of > inverse reference implementation. Same here: Reversed from Linux v4.9 drivers/pci/host/pcie-designware.c
