From: Shlomo Pongratz <shlomo.pongr...@huawei.com>
This patch is a first step multicores support for arm64.
This implemntation was tested up to 100 cores.
Things left to do:
Support SPI, ITS and ITS CONTROL, note that this patch porpose is to enable
running multi cores using the "virt" virtual machine and this goal is achived
without that.
Add GICv2 backwards competability. Since there is a GICv2 implementation I
can't see the pusprose for it.
Special thanks to Peter Crostwaite whose patch to th Linux (kernel) i.e.
Implement cpu_relax as yield solved the problem of the boot process getting
stuck for 24 cores and more.
Figure out why virtual machine name changed from virt-v3 to virt-v3-machine
V5->V4
- Remove the 64 cores limit by using bitmaps.
- Break the GICv3 code to multiple files e.g. distributer, redistributer, etc,
and submit each file in a patch of its own.
- Pass the cores' affinity to the GIC using property vector since the GIC
can't access the CPU data structure and it is not aware of the number of the
ARM_CPUS_PER_CLUSTER as defined in "target-arm/cpu.c"
Rebase to hash ee9dfed242610e from Oct 20.
V3->V4:
- Rebase the patch series on Pavel Feding's "vGICv3 support" V14 patch series.
- Replace the usage of vnic/irqchip in the CPU structure to keep the gic
object for the system instructions with the usage of the routine
define_arm_cp_regs_with_opaque() as suggested by Peter Maydell in his mail
from August the 3rd.
V2->V3:
- Replace my original 1 & 4 patches with Pavel's patches.
- Add groups support to complies with new GICv2 addtions
- Cosmetic changes.
V1->V2:
- Split the original patch to 4 patches
- Add SRE API to the GIC code.
- Add call to gicv3_update to armv8_gicv3_set_priority_mask.
- Cosmetic changes.
- Fix number of irq when reading GICD_TYPER.
Shlomo Pongratz (9):
hw/intc: Implement GIC-500 support files
hw/intc: arm_gicv3_interrupts
hw/intc: arm_gicv3_cpu_interface
hw/intc: arm_gicv3_dist
hw/intc arm_gicv3_redist
hw/intc: arm_gicv3_spi_its
hw/intc: arm_gicv3
target-arm/cpu64 GICv3 system instructions support
hw/arm: Add virt-v3 machine that uses GIC-500
hw/arm/virt.c | 87 ++++-
hw/intc/Makefile.objs | 6 +
hw/intc/arm_gicv3.c | 134 ++++++++
hw/intc/arm_gicv3_common.c | 251 +++++++++++++-
hw/intc/arm_gicv3_cpu_interface.c | 130 ++++++++
hw/intc/arm_gicv3_cpu_interface.h | 21 ++
hw/intc/arm_gicv3_dist.c | 655 +++++++++++++++++++++++++++++++++++++
hw/intc/arm_gicv3_dist.h | 9 +
hw/intc/arm_gicv3_interrupts.c | 295 +++++++++++++++++
hw/intc/arm_gicv3_interrupts.h | 11 +
hw/intc/arm_gicv3_redist.c | 460 ++++++++++++++++++++++++++
hw/intc/arm_gicv3_redist.h | 9 +
hw/intc/arm_gicv3_spi_its.c | 359 ++++++++++++++++++++
hw/intc/arm_gicv3_spi_its.h | 11 +
hw/intc/gicv3_internal.h | 243 ++++++++++++++
include/hw/arm/fdt.h | 2 +
include/hw/arm/virt.h | 1 +
include/hw/intc/arm_gicv3.h | 44 +++
include/hw/intc/arm_gicv3_common.h | 78 ++++-
target-arm/cpu-qom.h | 1 +
target-arm/cpu.h | 12 +
target-arm/cpu64.c | 118 +++++++
target-arm/machine.c | 7 +-
23 files changed, 2929 insertions(+), 15 deletions(-)
create mode 100644 hw/intc/arm_gicv3.c
create mode 100644 hw/intc/arm_gicv3_cpu_interface.c
create mode 100644 hw/intc/arm_gicv3_cpu_interface.h
create mode 100644 hw/intc/arm_gicv3_dist.c
create mode 100644 hw/intc/arm_gicv3_dist.h
create mode 100644 hw/intc/arm_gicv3_interrupts.c
create mode 100644 hw/intc/arm_gicv3_interrupts.h
create mode 100644 hw/intc/arm_gicv3_redist.c
create mode 100644 hw/intc/arm_gicv3_redist.h
create mode 100644 hw/intc/arm_gicv3_spi_its.c
create mode 100644 hw/intc/arm_gicv3_spi_its.h
create mode 100644 hw/intc/gicv3_internal.h
create mode 100644 include/hw/intc/arm_gicv3.h
--
1.9.1
