From: "Edgar E. Iglesias" <edgar.igles...@xilinx.com>
Reviewed-by: Greg Bellows <greg.bell...@linaro.org>
Signed-off-by: Edgar E. Iglesias <edgar.igles...@xilinx.com>
---
cpu-exec.c | 5 ++---
target-arm/cpu.h | 15 +++++++++++++++
2 files changed, 17 insertions(+), 3 deletions(-)
diff --git a/cpu-exec.c b/cpu-exec.c
index bd93165..d017588 100644
--- a/cpu-exec.c
+++ b/cpu-exec.c
@@ -596,7 +596,7 @@ int cpu_exec(CPUArchState *env)
}
#elif defined(TARGET_ARM)
if (interrupt_request & CPU_INTERRUPT_FIQ
- && !(env->daif & PSTATE_F)) {
+ && arm_excp_unmasked(cpu, EXCP_FIQ)) {
cpu->exception_index = EXCP_FIQ;
cc->do_interrupt(cpu);
next_tb = 0;
@@ -611,8 +611,7 @@ int cpu_exec(CPUArchState *env)
We avoid this by disabling interrupts when
pc contains a magic address. */
if (interrupt_request & CPU_INTERRUPT_HARD
- && !(env->daif & PSTATE_I)
- && (!IS_M(env) || env->regs[15] < 0xfffffff0)) {
+ && arm_excp_unmasked(cpu, EXCP_IRQ)) {
cpu->exception_index = EXCP_IRQ;
cc->do_interrupt(cpu);
next_tb = 0;
diff --git a/target-arm/cpu.h b/target-arm/cpu.h
index e2474d0..a5e8e0d 100644
--- a/target-arm/cpu.h
+++ b/target-arm/cpu.h
@@ -1171,6 +1171,21 @@ bool write_cpustate_to_list(ARMCPU *cpu);
# define TARGET_VIRT_ADDR_SPACE_BITS 32
#endif
+static inline bool arm_excp_unmasked(CPUState *cs, unsigned int excp_idx)
+{
+ CPUARMState *env = cs->env_ptr;
+
+ switch (excp_idx) {
+ case EXCP_FIQ:
+ return !(env->daif & PSTATE_F);
+ case EXCP_IRQ:
+ return !(env->daif & PSTATE_I)
+ && (!IS_M(env) || env->regs[15] < 0xfffffff0);
+ default:
+ g_assert_not_reached();
+ }
+}
+
static inline CPUARMState *cpu_init(const char *cpu_model)
{
ARMCPU *cpu = cpu_arm_init(cpu_model);
--
1.9.1
