On 2014-09-26 17:23, Peter Maydell wrote: > On 26 September 2014 09:08, Edgar E. Iglesias <edgar.igles...@gmail.com> > wrote: >> From: "Edgar E. Iglesias" <edgar.igles...@xilinx.com> >> >> Hi, >> >> This is a second round of AArch64 EL2/3 patches working on the exception >> model. Among other things adding HVC/SMC, interrupt routing to EL2/3 and >> Virtual IRQs/FIQs. The VIRQ/VFIQ support only adds the external signal >> delivery method. >> >> This conflicts slightly with the PSCI emulation patches that Rob posted. >> A rebase should be trivial, hooking in the PSCI emulation calls in the >> HVC/SMC code. > > Thanks. I've applied these to target-arm.next, with > some minor fixups to account for the cpu-exec > refactoring. Pushed to my git repo if you want > to grab it before I get round to doing a pullreq: > git://git.linaro.org/people/pmaydell/qemu-arm.git target-arm.next > > (I would still have preferred if we'd just implemented > the interrupt routing right to start with but in > the interests of making progress I'll let that pass.)
Sorry for hijacking the thread, but it seems related: These bits address AArch64, but what is the status of AArch32 /wrt hyp mode emulation? After playing with the "fast" model, I would be glad to find such support in QEMU rather sooner than later. Thanks, Jan -- Siemens AG, Corporate Technology, CT RTC ITP SES-DE Corporate Competence Center Embedded Linux
