On 08/28/2013 10:35 AM, Anthony Liguori wrote:
> Yes, it was originally designed with the 16TB limit in mind.
>
> PCI doesn't support 64-bit PIO operations so it would have required a
> high/low register and additional magic.
>
s/PCI/x86/
"Additional magic" is needed only if atomic changes are necessary, but
in this case this is stuff that is set up during early configuration and
so isn't an issue. The "additional magic" needed in that case is latch
logic - the write to the low part doesn't actually take effect until the
high part is written.
-hpa
