From: Philippe Mathieu-Daudé <phi...@linaro.org>
The A7MPCore forward the IRQs from its internal GIC.
To make the code clearer, add the 'mpcore' and 'gic'
variables. Rename 'd' variable as 'cpu'.
Reviewed-by: Cédric Le Goater <c...@kaod.org>
Signed-off-by: Philippe Mathieu-Daudé <phi...@linaro.org>
Message-id: 20250130112615.3219-4-phi...@linaro.org
Signed-off-by: Peter Maydell <peter.mayd...@linaro.org>
---
hw/arm/fsl-imx6ul.c | 64 +++++++++++++++++++--------------------------
1 file changed, 27 insertions(+), 37 deletions(-)
diff --git a/hw/arm/fsl-imx6ul.c b/hw/arm/fsl-imx6ul.c
index 79e4847953a..34c4aa15cd0 100644
--- a/hw/arm/fsl-imx6ul.c
+++ b/hw/arm/fsl-imx6ul.c
@@ -157,10 +157,12 @@ static void fsl_imx6ul_realize(DeviceState *dev, Error
**errp)
{
MachineState *ms = MACHINE(qdev_get_machine());
FslIMX6ULState *s = FSL_IMX6UL(dev);
+ DeviceState *mpcore = DEVICE(&s->a7mpcore);
int i;
char name[NAME_SIZE];
- SysBusDevice *sbd;
- DeviceState *d;
+ DeviceState *gic;
+ SysBusDevice *gicsbd;
+ DeviceState *cpu;
if (ms->smp.cpus > 1) {
error_setg(errp, "%s: Only a single CPU is supported (%d requested)",
@@ -173,19 +175,19 @@ static void fsl_imx6ul_realize(DeviceState *dev, Error
**errp)
/*
* A7MPCORE
*/
- object_property_set_int(OBJECT(&s->a7mpcore), "num-cpu", 1, &error_abort);
- object_property_set_int(OBJECT(&s->a7mpcore), "num-irq",
+ object_property_set_int(OBJECT(mpcore), "num-cpu", 1, &error_abort);
+ object_property_set_int(OBJECT(mpcore), "num-irq",
FSL_IMX6UL_MAX_IRQ + GIC_INTERNAL, &error_abort);
- sysbus_realize(SYS_BUS_DEVICE(&s->a7mpcore), &error_abort);
- sysbus_mmio_map(SYS_BUS_DEVICE(&s->a7mpcore), 0, FSL_IMX6UL_A7MPCORE_ADDR);
+ sysbus_realize(SYS_BUS_DEVICE(mpcore), &error_abort);
+ sysbus_mmio_map(SYS_BUS_DEVICE(mpcore), 0, FSL_IMX6UL_A7MPCORE_ADDR);
- sbd = SYS_BUS_DEVICE(&s->a7mpcore);
- d = DEVICE(&s->cpu);
-
- sysbus_connect_irq(sbd, 0, qdev_get_gpio_in(d, ARM_CPU_IRQ));
- sysbus_connect_irq(sbd, 1, qdev_get_gpio_in(d, ARM_CPU_FIQ));
- sysbus_connect_irq(sbd, 2, qdev_get_gpio_in(d, ARM_CPU_VIRQ));
- sysbus_connect_irq(sbd, 3, qdev_get_gpio_in(d, ARM_CPU_VFIQ));
+ gic = mpcore;
+ gicsbd = SYS_BUS_DEVICE(gic);
+ cpu = DEVICE(&s->cpu);
+ sysbus_connect_irq(gicsbd, 0, qdev_get_gpio_in(cpu, ARM_CPU_IRQ));
+ sysbus_connect_irq(gicsbd, 1, qdev_get_gpio_in(cpu, ARM_CPU_FIQ));
+ sysbus_connect_irq(gicsbd, 2, qdev_get_gpio_in(cpu, ARM_CPU_VIRQ));
+ sysbus_connect_irq(gicsbd, 3, qdev_get_gpio_in(cpu, ARM_CPU_VFIQ));
/*
* A7MPCORE DAP
@@ -244,8 +246,7 @@ static void fsl_imx6ul_realize(DeviceState *dev, Error
**errp)
FSL_IMX6UL_GPTn_ADDR[i]);
sysbus_connect_irq(SYS_BUS_DEVICE(&s->gpt[i]), 0,
- qdev_get_gpio_in(DEVICE(&s->a7mpcore),
- FSL_IMX6UL_GPTn_IRQ[i]));
+ qdev_get_gpio_in(gic, FSL_IMX6UL_GPTn_IRQ[i]));
}
/*
@@ -269,8 +270,7 @@ static void fsl_imx6ul_realize(DeviceState *dev, Error
**errp)
FSL_IMX6UL_EPITn_ADDR[i]);
sysbus_connect_irq(SYS_BUS_DEVICE(&s->epit[i]), 0,
- qdev_get_gpio_in(DEVICE(&s->a7mpcore),
- FSL_IMX6UL_EPITn_IRQ[i]));
+ qdev_get_gpio_in(gic, FSL_IMX6UL_EPITn_IRQ[i]));
}
/*
@@ -307,12 +307,10 @@ static void fsl_imx6ul_realize(DeviceState *dev, Error
**errp)
FSL_IMX6UL_GPIOn_ADDR[i]);
sysbus_connect_irq(SYS_BUS_DEVICE(&s->gpio[i]), 0,
- qdev_get_gpio_in(DEVICE(&s->a7mpcore),
- FSL_IMX6UL_GPIOn_LOW_IRQ[i]));
+ qdev_get_gpio_in(gic, FSL_IMX6UL_GPIOn_LOW_IRQ[i]));
sysbus_connect_irq(SYS_BUS_DEVICE(&s->gpio[i]), 1,
- qdev_get_gpio_in(DEVICE(&s->a7mpcore),
- FSL_IMX6UL_GPIOn_HIGH_IRQ[i]));
+ qdev_get_gpio_in(gic,
FSL_IMX6UL_GPIOn_HIGH_IRQ[i]));
}
/*
@@ -366,8 +364,7 @@ static void fsl_imx6ul_realize(DeviceState *dev, Error
**errp)
FSL_IMX6UL_SPIn_ADDR[i]);
sysbus_connect_irq(SYS_BUS_DEVICE(&s->spi[i]), 0,
- qdev_get_gpio_in(DEVICE(&s->a7mpcore),
- FSL_IMX6UL_SPIn_IRQ[i]));
+ qdev_get_gpio_in(gic, FSL_IMX6UL_SPIn_IRQ[i]));
}
/*
@@ -392,8 +389,7 @@ static void fsl_imx6ul_realize(DeviceState *dev, Error
**errp)
sysbus_mmio_map(SYS_BUS_DEVICE(&s->i2c[i]), 0,
FSL_IMX6UL_I2Cn_ADDR[i]);
sysbus_connect_irq(SYS_BUS_DEVICE(&s->i2c[i]), 0,
- qdev_get_gpio_in(DEVICE(&s->a7mpcore),
- FSL_IMX6UL_I2Cn_IRQ[i]));
+ qdev_get_gpio_in(gic, FSL_IMX6UL_I2Cn_IRQ[i]));
}
/*
@@ -430,8 +426,7 @@ static void fsl_imx6ul_realize(DeviceState *dev, Error
**errp)
FSL_IMX6UL_UARTn_ADDR[i]);
sysbus_connect_irq(SYS_BUS_DEVICE(&s->uart[i]), 0,
- qdev_get_gpio_in(DEVICE(&s->a7mpcore),
- FSL_IMX6UL_UARTn_IRQ[i]));
+ qdev_get_gpio_in(gic, FSL_IMX6UL_UARTn_IRQ[i]));
}
/*
@@ -480,12 +475,10 @@ static void fsl_imx6ul_realize(DeviceState *dev, Error
**errp)
FSL_IMX6UL_ENETn_ADDR[i]);
sysbus_connect_irq(SYS_BUS_DEVICE(&s->eth[i]), 0,
- qdev_get_gpio_in(DEVICE(&s->a7mpcore),
- FSL_IMX6UL_ENETn_IRQ[i]));
+ qdev_get_gpio_in(gic, FSL_IMX6UL_ENETn_IRQ[i]));
sysbus_connect_irq(SYS_BUS_DEVICE(&s->eth[i]), 1,
- qdev_get_gpio_in(DEVICE(&s->a7mpcore),
- FSL_IMX6UL_ENETn_TIMER_IRQ[i]));
+ qdev_get_gpio_in(gic,
FSL_IMX6UL_ENETn_TIMER_IRQ[i]));
}
/*
@@ -521,8 +514,7 @@ static void fsl_imx6ul_realize(DeviceState *dev, Error
**errp)
sysbus_mmio_map(SYS_BUS_DEVICE(&s->usb[i]), 0,
FSL_IMX6UL_USB02_USBn_ADDR[i]);
sysbus_connect_irq(SYS_BUS_DEVICE(&s->usb[i]), 0,
- qdev_get_gpio_in(DEVICE(&s->a7mpcore),
- FSL_IMX6UL_USBn_IRQ[i]));
+ qdev_get_gpio_in(gic, FSL_IMX6UL_USBn_IRQ[i]));
}
/*
@@ -547,8 +539,7 @@ static void fsl_imx6ul_realize(DeviceState *dev, Error
**errp)
FSL_IMX6UL_USDHCn_ADDR[i]);
sysbus_connect_irq(SYS_BUS_DEVICE(&s->usdhc[i]), 0,
- qdev_get_gpio_in(DEVICE(&s->a7mpcore),
- FSL_IMX6UL_USDHCn_IRQ[i]));
+ qdev_get_gpio_in(gic, FSL_IMX6UL_USDHCn_IRQ[i]));
}
/*
@@ -580,8 +571,7 @@ static void fsl_imx6ul_realize(DeviceState *dev, Error
**errp)
sysbus_mmio_map(SYS_BUS_DEVICE(&s->wdt[i]), 0,
FSL_IMX6UL_WDOGn_ADDR[i]);
sysbus_connect_irq(SYS_BUS_DEVICE(&s->wdt[i]), 0,
- qdev_get_gpio_in(DEVICE(&s->a7mpcore),
- FSL_IMX6UL_WDOGn_IRQ[i]));
+ qdev_get_gpio_in(gic, FSL_IMX6UL_WDOGn_IRQ[i]));
}
/*
--
2.34.1
