[Note: I've kept the cc list from the last round of cpu model patches; so if you're confused as to why you're cc:ed here, take it as a heads-up that a new cpu model series will come along soon]
This patch series contains patches extracted from the larger cpu model series (RFC v2 last posted at https://lore.kernel.org/qemu-devel/20241206112213.88394-1-coh...@redhat.com/) and aims at providing a base upon which we can continue with building support for cpu models, but which is hopefully already an improvement on its own. Main changes from the patches in that series include: - post-pone the changes to handle KVM writable ID registers for cpu models (I have a series including that on top of this one) - change how we store the list of ID registers, and access them basically, use an enum for indexing, and an enum doing encodings in a pattern similar to cpregs - move some hunks to different patches - update the scripts to generate the register descriptions, and run them against a recent Linux sysregs file What I've kept: - generating the register descriptions from the Linux sysregs file I think that file is still our best bet to generate the descriptions easily, and updating the definitions is a manual step that can be checked for unintended changes - most of the hard work that Eric had been doing; all new bugs in there are my own :) Also available at https://gitlab.com/cohuck/qemu/-/commits/arm-rework-idreg-storage I plan to send cpu model patches based on top of this Real Soon(tm). Cornelia Huck (2): arm/kvm: add accessors for storing host features into idregs arm/cpu: Add generated files Eric Auger (13): arm/cpu: Add sysreg definitions in cpu-sysregs.h arm/cpu: Store aa64isar0 into the idregs arrays arm/cpu: Store aa64isar1/2 into the idregs array arm/cpu: Store aa64pfr0/1 into the idregs array arm/cpu: Store aa64mmfr0-3 into the idregs array arm/cpu: Store aa64dfr0/1 into the idregs array arm/cpu: Store aa64smfr0 into the idregs array arm/cpu: Store id_isar0-7 into the idregs array arm/cpu: Store id_mfr0/1 into the idregs array arm/cpu: Store id_dfr0/1 into the idregs array arm/cpu: Store id_mmfr0-5 into the idregs array arm/cpu: Add infra to handle generated ID register definitions arm/cpu: Add sysreg generation scripts hw/intc/armv7m_nvic.c | 27 +- scripts/gen-cpu-sysreg-properties.awk | 325 ++++++++++++ scripts/gen-cpu-sysregs-header.awk | 70 +++ scripts/update-aarch64-sysreg-code.sh | 30 ++ target/arm/cpu-custom.h | 55 ++ target/arm/cpu-features.h | 313 +++++------ target/arm/cpu-sysreg-properties.c | 713 ++++++++++++++++++++++++++ target/arm/cpu-sysregs.h | 22 + target/arm/cpu-sysregs.h.inc | 164 ++++++ target/arm/cpu.c | 111 ++-- target/arm/cpu.h | 73 +-- target/arm/cpu64.c | 133 +++-- target/arm/helper.c | 68 +-- target/arm/internals.h | 6 +- target/arm/kvm.c | 138 ++--- target/arm/meson.build | 1 + target/arm/ptw.c | 6 +- target/arm/tcg/cpu-v7m.c | 174 ++++--- target/arm/tcg/cpu32.c | 320 ++++++------ target/arm/tcg/cpu64.c | 460 +++++++++-------- 20 files changed, 2308 insertions(+), 901 deletions(-) create mode 100755 scripts/gen-cpu-sysreg-properties.awk create mode 100755 scripts/gen-cpu-sysregs-header.awk create mode 100755 scripts/update-aarch64-sysreg-code.sh create mode 100644 target/arm/cpu-custom.h create mode 100644 target/arm/cpu-sysreg-properties.c create mode 100644 target/arm/cpu-sysregs.h create mode 100644 target/arm/cpu-sysregs.h.inc -- 2.48.1
