From: Manos Pitsidianakis <manos.pitsidiana...@linaro.org>
Add system test to make sure FEAT_XS is enabled for max cpu emulation
and that QEMU doesn't crash when encountering an NXS instruction
variant.
Signed-off-by: Manos Pitsidianakis <manos.pitsidiana...@linaro.org>
[PMM: In ISAR field test, mask with 0xf, not 0xff; use < rather
than an equality test to follow the standard ID register field
check guidelines]
Signed-off-by: Peter Maydell <peter.mayd...@linaro.org>
---
tests/tcg/aarch64/system/feat-xs.c | 27 +++++++++++++++++++++++++++
1 file changed, 27 insertions(+)
create mode 100644 tests/tcg/aarch64/system/feat-xs.c
diff --git a/tests/tcg/aarch64/system/feat-xs.c
b/tests/tcg/aarch64/system/feat-xs.c
new file mode 100644
index 00000000000..f310fc837e0
--- /dev/null
+++ b/tests/tcg/aarch64/system/feat-xs.c
@@ -0,0 +1,27 @@
+/*
+ * FEAT_XS Test
+ *
+ * Copyright (c) 2024 Linaro Ltd
+ *
+ * SPDX-License-Identifier: GPL-2.0-or-later
+ */
+
+#include <minilib.h>
+#include <stdint.h>
+
+int main(void)
+{
+ uint64_t isar1;
+
+ asm volatile ("mrs %0, id_aa64isar1_el1" : "=r"(isar1));
+ if (((isar1 >> 56) & 0xf) < 1) {
+ ml_printf("FEAT_XS not supported by CPU");
+ return 1;
+ }
+ /* VMALLE1NXS */
+ asm volatile (".inst 0xd508971f");
+ /* VMALLE1OSNXS */
+ asm volatile (".inst 0xd508911f");
+
+ return 0;
+}
--
2.34.1
