On Mon, Oct 7, 2024 at 1:36 PM LIU Zhiwei <zhiwei_...@linux.alibaba.com> wrote:
>
> From: TANG Tiancheng <tangtiancheng....@alibaba-inc.com>
>
> Satp and PTE are always SXLEN-bit. when SXLEN is 32,
> read PTE as 4 bytes, and treat satp as SATP32.
>
> Signed-off-by: TANG Tiancheng <tangtiancheng....@alibaba-inc.com>
Reviewed-by: Alistair Francis <alistair.fran...@wdc.com>
Alistair
> ---
> target/riscv/cpu_helper.c | 4 ++--
> 1 file changed, 2 insertions(+), 2 deletions(-)
>
> diff --git a/target/riscv/cpu_helper.c b/target/riscv/cpu_helper.c
> index 077f6d77c3..773789e02e 100644
> --- a/target/riscv/cpu_helper.c
> +++ b/target/riscv/cpu_helper.c
> @@ -851,7 +851,7 @@ static int get_physical_address(CPURISCVState *env,
> hwaddr *physical,
> vm = get_field(env->vsatp, SATP64_MODE);
> }
> } else {
> - if (riscv_cpu_mxl(env) == MXL_RV32) {
> + if (riscv_cpu_sxl(env) == MXL_RV32) {
> base = (hwaddr)get_field(env->satp, SATP32_PPN) << PGSHIFT;
> vm = get_field(env->satp, SATP32_MODE);
> } else {
> @@ -972,7 +972,7 @@ restart:
> return TRANSLATE_PMP_FAIL;
> }
>
> - if (riscv_cpu_mxl(env) == MXL_RV32) {
> + if (riscv_cpu_sxl(env) == MXL_RV32) {
> pte = address_space_ldl(cs->as, pte_addr, attrs, &res);
> } else {
> pte = address_space_ldq(cs->as, pte_addr, attrs, &res);
> --
> 2.43.0
>
>
