First target-arm queue for 9.2. I know I have more stuff in my to-review queue after this...
-- PMM The following changes since commit cab1afb393ea0943b3086188e91d71d594ede6bf: Merge tag 'hppa-v9.1-fixes-pull-request' of https://github.com/hdeller/qemu-hppa into staging (2024-09-04 13:20:17 +0100) are available in the Git repository at: https://git.linaro.org/people/pmaydell/qemu-arm.git tags/pull-target-arm-20240905 for you to fetch changes up to 99ec7b440a1d6a6ef07450b68687d24d13a25fb5: platform-bus: fix refcount leak (2024-09-05 13:12:37 +0100) ---------------------------------------------------------------- target-arm queue: * Implement FEAT_EBF16 emulation * accel/tcg: Remove dead code from rr_cpu_thread_fn() * hw: add compat machines for 9.2 * virt: default to two-stage SMMU from virt-9.2 * sbsa-ref: use two-stage SMMU * hw: Various minor memory leak fixes * target/arm: Correct names of VFP VFNMA and VFNMS insns * hw/arm/xilinx_zynq: Enable Security Extensions * hw/arm/boot: Report error msg if loading elf/dtb failed ---------------------------------------------------------------- Changbin Du (1): hw/arm/boot: Report error msg if loading elf/dtb failed Cornelia Huck (1): hw: add compat machines for 9.2 Gao Shiyuan (1): platform-bus: fix refcount leak Peter Maydell (20): target/arm: Allow setting the FPCR.EBF bit for FEAT_EBF16 target/arm: Pass env pointer through to sme_bfmopa helper target/arm: Pass env pointer through to gvec_bfdot helper target/arm: Pass env pointer through to gvec_bfdot_idx helper target/arm: Pass env pointer through to gvec_bfmmla helper target/arm: Prepare bfdotadd() callers for FEAT_EBF support target/arm: Implement FPCR.EBF=1 semantics for bfdotadd() target/arm: Enable FEAT_EBF16 in the "max" CPU accel/tcg: Remove dead code from rr_cpu_thread_fn() hw/arm/smmuv3: Update comment documenting "stage" property hw/arm/virt: Default to two-stage SMMU from virt-9.2 hw/arm/sbsa-ref: Use two-stage SMMU hw/misc/xlnx-versal-cfu: destroy fifo in finalize hw/misc/xlnx-versal-trng: Free s->prng in finalize, not unrealize hw/nvram/xlnx-bbram: Call register_finalize_block hw/nvram/xlnx-zynqmp-efuse: Call register_finalize_block hw/misc/xlnx-versal-trng: Call register_finalize_block hm/nvram/xlnx-versal-efuse-ctrl: Call register_finalize_block hw/arm/sbsa-ref: Don't leak string in sbsa_fdt_add_gic_node() target/arm: Correct names of VFP VFNMA and VFNMS insns Philippe Mathieu-Daudé (1): hw/arm/boot: Explain why load_elf_hdr() error is ignored Sebastian Huber (1): hw/arm/xilinx_zynq: Enable Security Extensions docs/system/arm/emulation.rst | 1 + include/hw/arm/virt.h | 1 + include/hw/boards.h | 3 + include/hw/i386/pc.h | 3 + include/hw/misc/xlnx-versal-trng.h | 1 + include/hw/nvram/xlnx-bbram.h | 1 + include/hw/nvram/xlnx-versal-efuse.h | 1 + include/hw/nvram/xlnx-zynqmp-efuse.h | 1 + target/arm/cpu-features.h | 5 + target/arm/cpu.h | 1 + target/arm/helper.h | 12 +-- target/arm/tcg/helper-sme.h | 4 +- target/arm/tcg/vec_internal.h | 37 ++++++- target/arm/tcg/vfp.decode | 12 +-- accel/tcg/tcg-accel-ops-rr.c | 4 +- hw/arm/boot.c | 10 +- hw/arm/sbsa-ref.c | 16 ++- hw/arm/smmuv3.c | 1 + hw/arm/virt.c | 19 +++- hw/arm/xilinx_zynq.c | 8 -- hw/core/machine.c | 3 + hw/core/platform-bus.c | 5 +- hw/i386/pc.c | 3 + hw/i386/pc_piix.c | 15 ++- hw/i386/pc_q35.c | 13 ++- hw/m68k/virt.c | 11 +- hw/misc/xlnx-versal-cfu.c | 8 ++ hw/misc/xlnx-versal-trng.c | 12 +-- hw/nvram/xlnx-bbram.c | 13 ++- hw/nvram/xlnx-versal-efuse-ctrl.c | 6 +- hw/nvram/xlnx-zynqmp-efuse.c | 13 ++- hw/ppc/spapr.c | 17 ++- hw/s390x/s390-virtio-ccw.c | 14 ++- target/arm/tcg/cpu64.c | 4 +- target/arm/tcg/sme_helper.c | 78 +++++++++----- target/arm/tcg/translate-a64.c | 40 ++++++- target/arm/tcg/translate-neon.c | 43 ++++++-- target/arm/tcg/translate-sme.c | 3 +- target/arm/tcg/translate-sve.c | 25 ++++- target/arm/tcg/translate-vfp.c | 8 +- target/arm/tcg/vec_helper.c | 200 ++++++++++++++++++++++++++++------- target/arm/vfp_helper.c | 8 +- 42 files changed, 529 insertions(+), 154 deletions(-)
