There is no advantage in having these local variables which 1/ needlessly have
different identifiers in both machines and 2/ which are redundant to pcms->bus
which is almost as short.
Signed-off-by: Bernhard Beschow <shen...@gmail.com>
---
hw/i386/pc_piix.c | 14 ++++++--------
hw/i386/pc_q35.c | 16 +++++++---------
2 files changed, 13 insertions(+), 17 deletions(-)
diff --git a/hw/i386/pc_piix.c b/hw/i386/pc_piix.c
index adb7926b2e..a9f0e255ad 100644
--- a/hw/i386/pc_piix.c
+++ b/hw/i386/pc_piix.c
@@ -109,7 +109,6 @@ static void pc_init1(MachineState *machine,
MemoryRegion *system_memory = get_system_memory();
MemoryRegion *system_io = get_system_io();
Object *phb = NULL;
- PCIBus *pci_bus = NULL;
ISABus *isa_bus;
Object *piix4_pm = NULL;
qemu_irq smi_irq;
@@ -213,11 +212,10 @@ static void pc_init1(MachineState *machine,
&error_fatal);
sysbus_realize_and_unref(SYS_BUS_DEVICE(phb), &error_fatal);
- pci_bus = PCI_BUS(qdev_get_child_bus(DEVICE(phb), "pci.0"));
- pci_bus_map_irqs(pci_bus,
+ pcms->bus = PCI_BUS(qdev_get_child_bus(DEVICE(phb), "pci.0"));
+ pci_bus_map_irqs(pcms->bus,
xen_enabled() ? xen_pci_slot_get_pirq
: pc_pci_slot_get_pirq);
- pcms->bus = pci_bus;
hole64_size = object_property_get_uint(phb,
PCI_HOST_PROP_PCI_HOLE64_SIZE,
@@ -262,7 +260,7 @@ static void pc_init1(MachineState *machine,
for (i = 0; i < ISA_NUM_IRQS; i++) {
qdev_connect_gpio_out_named(dev, "isa-irqs", i, x86ms->gsi[i]);
}
- pci_realize_and_unref(pci_dev, pci_bus, &error_fatal);
+ pci_realize_and_unref(pci_dev, pcms->bus, &error_fatal);
if (xen_enabled()) {
pci_device_set_intx_routing_notifier(
@@ -274,7 +272,7 @@ static void pc_init1(MachineState *machine,
* connected to the IOAPIC directly.
* These additional routes can be discovered through ACPI.
*/
- pci_bus_irqs(pci_bus, xen_intx_set_irq, pci_dev,
+ pci_bus_irqs(pcms->bus, xen_intx_set_irq, pci_dev,
XEN_IOAPIC_NUM_PIRQS);
}
@@ -313,7 +311,7 @@ static void pc_init1(MachineState *machine,
x86_register_ferr_irq(x86ms->gsi[13]);
}
- pc_vga_init(isa_bus, pcmc->pci_enabled ? pci_bus : NULL);
+ pc_vga_init(isa_bus, pcmc->pci_enabled ? pcms->bus : NULL);
assert(pcms->vmport != ON_OFF_AUTO__MAX);
if (pcms->vmport == ON_OFF_AUTO_AUTO) {
@@ -324,7 +322,7 @@ static void pc_init1(MachineState *machine,
pc_basic_device_init(pcms, isa_bus, x86ms->gsi, x86ms->rtc, true,
0x4);
- pc_nic_init(pcmc, isa_bus, pci_bus);
+ pc_nic_init(pcmc, isa_bus, pcms->bus);
#ifdef CONFIG_IDE_ISA
if (!pcmc->pci_enabled) {
diff --git a/hw/i386/pc_q35.c b/hw/i386/pc_q35.c
index d313ba5509..0eef9e6ca1 100644
--- a/hw/i386/pc_q35.c
+++ b/hw/i386/pc_q35.c
@@ -122,7 +122,6 @@ static void pc_q35_init(MachineState *machine)
PCMachineClass *pcmc = PC_MACHINE_GET_CLASS(pcms);
X86MachineState *x86ms = X86_MACHINE(machine);
Object *phb;
- PCIBus *host_bus;
PCIDevice *lpc;
DeviceState *lpc_dev;
BusState *idebus[MAX_SATA_PORTS];
@@ -227,8 +226,7 @@ static void pc_q35_init(MachineState *machine)
sysbus_realize_and_unref(SYS_BUS_DEVICE(phb), &error_fatal);
/* pci */
- host_bus = PCI_BUS(qdev_get_child_bus(DEVICE(phb), "pcie.0"));
- pcms->bus = host_bus;
+ pcms->bus = PCI_BUS(qdev_get_child_bus(DEVICE(phb), "pcie.0"));
/* irq lines */
gsi_state = pc_gsi_create(&x86ms->gsi, pcmc->pci_enabled);
@@ -242,7 +240,7 @@ static void pc_q35_init(MachineState *machine)
for (i = 0; i < IOAPIC_NUM_PINS; i++) {
qdev_connect_gpio_out_named(lpc_dev, ICH9_GPIO_GSI, i, x86ms->gsi[i]);
}
- pci_realize_and_unref(lpc, host_bus, &error_fatal);
+ pci_realize_and_unref(lpc, pcms->bus, &error_fatal);
x86ms->rtc = ISA_DEVICE(object_resolve_path_component(OBJECT(lpc), "rtc"));
@@ -293,7 +291,7 @@ static void pc_q35_init(MachineState *machine)
if (pcms->sata_enabled) {
/* ahci and SATA device, for q35 1 ahci controller is built-in */
- ahci = pci_create_simple_multifunction(host_bus,
+ ahci = pci_create_simple_multifunction(pcms->bus,
PCI_DEVFN(ICH9_SATA1_DEV,
ICH9_SATA1_FUNC),
"ich9-ahci");
@@ -308,14 +306,14 @@ static void pc_q35_init(MachineState *machine)
if (machine_usb(machine)) {
/* Should we create 6 UHCI according to ich9 spec? */
- ehci_create_ich9_with_companions(host_bus, 0x1d);
+ ehci_create_ich9_with_companions(pcms->bus, 0x1d);
}
if (pcms->smbus_enabled) {
PCIDevice *smb;
/* TODO: Populate SPD eeprom data. */
- smb = pci_create_simple_multifunction(host_bus,
+ smb = pci_create_simple_multifunction(pcms->bus,
PCI_DEVFN(ICH9_SMB_DEV,
ICH9_SMB_FUNC),
TYPE_ICH9_SMB_DEVICE);
@@ -327,8 +325,8 @@ static void pc_q35_init(MachineState *machine)
pc_cmos_init(pcms, idebus[0], idebus[1], x86ms->rtc);
/* the rest devices to which pci devfn is automatically assigned */
- pc_vga_init(isa_bus, host_bus);
- pc_nic_init(pcmc, isa_bus, host_bus);
+ pc_vga_init(isa_bus, pcms->bus);
+ pc_nic_init(pcmc, isa_bus, pcms->bus);
if (machine->nvdimms_state->is_enabled) {
nvdimm_init_acpi_state(machine->nvdimms_state, system_io,
--
2.43.0
