On 27/11/13 08:48, Florian Fainelli wrote:
On Nov 26, 2013 11:42 PM, "John Crispin" <j...@phrozen.org <mailto:j...@phrozen.org>> wrote: > > On 26/11/13 23:29, José Vázquez wrote: >> >> Maybe the problem is that part of the new init process does not work >> well with two cpus:http://pastebin.com/LTUmbxZ6 > > > > who says the new init does not work on smp ? i would claim that bmips is just not supported properly and the maintainers of the code base have let the code rot for too long ... That is kind of gratuitous, I see no evidence of problems coming from the BMIPS SMP support code. The other BMIPS based platforms I have seen do not have any jffs2 problems but they do not use overlayfs. I still think that there might be some missing cache flushing in the overlay fs code which only pops up with BMIPS CPUs due to how the I/D caches are designed between the two threads. Time to reproduce that on my end too.
according to you its a caching problem. as other mips boards have working SMP i would expect this to be bmips related.
_______________________________________________ openwrt-devel mailing list openwrt-devel@lists.openwrt.org https://lists.openwrt.org/cgi-bin/mailman/listinfo/openwrt-devel
