On 08/05/11 10:48, Luca Olivetti wrote: > Al 08/05/11 10:33, En/na John Crispin ha escrit: > >> >> if it was 29 on ifxmips/ it will be 29 on lantiq/. only the stp and ebu >> gpios were mapped to new offsets. the first 32 gpios stayed the same. > > Not related to the original question, but where I could find some > documentation > on stp/ebu, what they are and how do they work? > There are some leds on my router that aren't tied to the "normal" GPIOs and > I'd like to know how to drive them, maybe they are related to this stp/ebu > thing? > > Bye
STP - serial to parallel it is a setup where 3 pins are attached to a shift register or cascade thereof. it can go 24 bit deep. the xway socs have a few registers to control this. the actual magic of clocking the data out on the SPI into the shift registers is done by the IP core. the user only defines which led should be on. there is also a magic register to tell the leds to blink at 1 2 4 8 hz. a common chip used fotr this is the 74*595 EBU - external bus unit similar to STP but parallel. the xway has 4 x 16 bit ioport ranges that can be mapped to a special memory location. data written to that location is that physically written to the D0-15 lines on the memory bus. in addition a CS line is toggled. this allows you to use a 8-16bit latch to latch out the data. a common chip used for this is 74*373 _______________________________________________ openwrt-devel mailing list openwrt-devel@lists.openwrt.org https://lists.openwrt.org/mailman/listinfo/openwrt-devel
