On Mon, Jun 21, 2010 at 4:01 PM, David Brownell <davi...@pacbell.net> wrote: > > > --- On Mon, 6/21/10, Øyvind Harboe <oyvind.har...@zylin.com> wrote: > > > From: Øyvind Harboe <oyvind.har...@zylin.com> > > Subject: Re: [Openocd-development] TI AM3517 status > > Looks like I'm talking > > to the CPU at least as it seems to be able to figure out > > that > > the CPU has 6 breakpoints and 2 watchpoints, which sounds about right I > > suppose. > > > Sounds a bit wierd to me, but you should be > able to sanity check that register value against > ARM documentation... I think > you'll want the ARMv6/v7 arch manual and the > Cortex-A8 reference manual. > > (ISTR more {watchpoints, but maybe > I'm mis-remembering.
I'm 100% convinced that I'm talking to the CPU with my latest configuration file as I can single step, reset, modify memory, etc. I'll be merging an board config file for Ti AM3517 EVM that is good enough for alpha testing. -- Øyvind Harboe US toll free 1-866-980-3434 / International +47 51 63 25 00 http://www.zylin.com/zy1000.html ARM7 ARM9 ARM11 XScale Cortex JTAG debugger and flash programmer _______________________________________________ Openocd-development mailing list Openocd-development@lists.berlios.de https://lists.berlios.de/mailman/listinfo/openocd-development