I've hooked it up and fixed some error handling problems in OpenOCD. Now I'm stuck until I can find documentation on the JTAG chain for this part. (Or rather I don't particularly enjoy the prospect of resorting to reverse engineering...). Hopefully I've just overlooked some obvious resource that is publicly available. Hints anyone?
Below is proof of life from the board at least: # TI AM517 # http://focus.ti.com/docs/prod/folders/print/am3517.html # http://processors.wiki.ti.com/index.php/Debug_Access_Port_(DAP) # http://processors.wiki.ti.com/index.php?title=How_to_Find_the_Silicon_Revision_of_your_OMAP35x # openocd -c "interface ZY1000" -c "zy1000_server 10.0.0.69" -c "reset_config trst_only" if { [info exists CHIPNAME] } { set _CHIPNAME $CHIPNAME } else { set _CHIPNAME am3517 } set JRC_TAPID 0 set DAP_TAPID 0x0b86802f # Subsidiary TAP: CoreSight Debug Access Port (DAP) if { [info exists DAP_TAPID ] } { set _DAP_TAPID $DAP_TAPID } else { set _DAP_TAPID 0x0b6d602f } # Primary TAP: ICEpick-C (JTAG route controller) and boundary scan if { [info exists JRC_TAPID ] } { set _JRC_TAPID $JRC_TAPID } else { set _JRC_TAPID 0x0b7ae02f } # ICEpick-C ... used to route Cortex, and more not shown here source [find target/icepick.cfg] jtag newtap $_CHIPNAME jrc -irlen 6 -ircapture 0x1 -irmask 0x3f \ -expected-id $_JRC_TAPID jtag newtap $_CHIPNAME dap -irlen 4 -ircapture 0x1 -irmask 0xf \ -expected-id $_DAP_TAPID -disable jtag configure $_CHIPNAME.dap -event tap-enable \ "icepick_c_tapenable $_CHIPNAME.jrc 2" # GDB target: Cortex-A8, using DAP set _TARGETNAME $_CHIPNAME.cpu target create $_TARGETNAME cortex_a8 -chain-position $_CHIPNAME.dap # SRAM: 64K at 0x4020.0000; use the first 16K $_TARGETNAME configure -work-area-phys 0x40200000 -work-area-size 0x4000 ################### # the reset sequence is event-driven # and kind of finicky... # some TCK tycles are required to activate the DEBUG power domain jtag configure $_CHIPNAME.jrc -event post-reset "runtest 100" # have the DAP "always" be active jtag configure $_CHIPNAME.jrc -event setup "jtag tapenable $_CHIPNAME.dap" proc omap3_dbginit {target} { # General Cortex A8 debug initialisation cortex_a8 dbginit # Enable DBGU signal for OMAP353x $target mww 0x5401d030 0x00002000 } # be absolutely certain the JTAG clock will work with the worst-case # 16.8MHz/2 = 8.4MHz core clock, even before a bootloader kicks in. # OK to speed up *after* PLL and clock tree setup. jtag_rclk 1000 $_TARGETNAME configure -event "reset-start" { jtag_rclk 1000 } # Assume SRST is unavailable (e.g. TI-14 JTAG), so we must assert reset # ourselves using PRM_RSTCTRL. RST_GS (2) is a warm reset, like ICEpick # would issue. RST_DPLL3 (4) is a cold reset. #set PRM_RSTCTRL 0x48307250 #$_TARGETNAME configure -event reset-assert "$_TARGETNAME mww $PRM_RSTCTRL 2" $_TARGETNAME configure -event reset-assert-post "cortex_a8 dbginit" reset_config trst_only init reset reset init shutdown --- output Open On-Chip Debugger 0.5.0-dev-00357-g2d7c078 (2010-06-21-08:46) Licensed under GNU GPL v2 For bug reports, read http://openocd.berlios.de/doc/doxygen/bugs.html RCLK - adaptive trst_only separate trst_push_pull Info : RCLK (adaptive clock speed) Error: JTAG scan chain interrogation failed: all zeroes Error: Check JTAG interface, timings, target power, etc. Info : JTAG tap: am3517.jrc tap/device found: 0x0b86802f (mfg: 0x017, part: 0xb868, ver: 0x0) Info : JTAG tap: am3517.dap enabled Warn : Invalid ACK 0 in JTAG-DP transaction RCLK - adaptive Info : JTAG tap: am3517.jrc tap/device found: 0x0b86802f (mfg: 0x017, part: 0xb868, ver: 0x0) Info : JTAG tap: am3517.dap enabled Warn : Invalid ACK 0 in JTAG-DP transaction examine-fails: -107 Command handler execution failed in procedure 'reset' called at file "../ti.cfg", line 95 called at file "embedded:startup.tcl", line 57 in procedure 'script' -- Øyvind Harboe US toll free 1-866-980-3434 / International +47 51 63 25 00 http://www.zylin.com/zy1000.html ARM7 ARM9 ARM11 XScale Cortex JTAG debugger and flash programmer _______________________________________________ Openocd-development mailing list Openocd-development@lists.berlios.de https://lists.berlios.de/mailman/listinfo/openocd-development
