On Monday 15 February 2010, David Brownell wrote: > On Monday 15 February 2010, Jörg Fischer wrote: > > because the tcl/target/lpc1768.cfg seems to have some issues: > > > > "arm core_state arm" is not possible on the LPC1768. > > Of course not ... it's Cortex-M3 processor, which only > supports the Thumb2 instruction set ... not "classic ARM"
Ah, I see ... the issue is that the lpc1768.cfg is broken in that respect. Fix by just removing that command from the reset-init event handler. (Looks like some reset-init handlers are buggy, in that they used to "soft_reset_halt" at the beginning even though the core is guaranteed to be halted then, right after reset. Someone tried a partial fix for lpc1768, which was buggy. at91sam7sx.cfg still has the bug...) > > It also doesn't remap the Bootloader on Address 0x00000000 > > correctly. The LPC1768-Stick has only a 4 MHz > > quartz crystal (needed for the flash definitio line). > > Are you saying that nothing puts the flash at 0, and it's > always the boot loader? I thought the remapping was part > of the boot configuration for LPC chips... I'm not following that at all. The comment in that reset-init handler is way off-base ... what it's doing is setting the NVIC.VTOR pointer to its reset value (0). Pointless. That's got nothing to do with the boot loader... All in all ... I'd say that lpc1768 reset-init event handler looks like it's just one big bug. Such code should be board-specific, setting up clocks and maybe a bit more ... then finish with "flash probe". - Dave _______________________________________________ Openocd-development mailing list Openocd-development@lists.berlios.de https://lists.berlios.de/mailman/listinfo/openocd-development
