Hi Fabio, On 1/15/10, Fabio Estevam <fabioeste...@yahoo.com> wrote: > Hi, > > Has anyone used OpenOCD on a Freescale MX51 processor so far? >
I'm trying to get it working. OpenOCD detects all TAPs, but I receive a Timeout: Warn : imx51.SDMA: nonstandard IR value RCLK - adaptive Info : device: 4 "2232C" Info : deviceID: 67353760 Info : SerialNumber: 0100480 A Info : Description: Signalyzer A Info : RCLK (adaptive clock speed) not supported - fallback to 1000 kHz Info : JTAG tap: imx51.DAP tap/device found: 0x1ba00477 (mfg: 0x23b, part: 0xba00, ver: 0x1) Info : TAP imx51.SDMA does not have IDCODE Info : JTAG tap: imx51.SJC tap/device found: 0x0190c01d (mfg: 0x00e, part: 0x190c, ver: 0x0) Warn : failed to disable tap Warn : Timeout (1000ms) waiting for ACK=OK/FAULT (got ACK=0x1) in JTAG-DP transaction Warn : Timeout (1000ms) waiting for ACK=OK/FAULT (got ACK=0x1) in JTAG-DP transaction Warn : Timeout (1000ms) waiting for ACK=OK/FAULT (got ACK=0x1) in JTAG-DP transaction Warn : Timeout (1000ms) waiting for ACK=OK/FAULT (got ACK=0x1) in JTAG-DP transaction This is imx51.cfg for your reference: #-------------------------------------------------------------------------------------------------- # Freescale i.MX51 if { [info exists CHIPNAME] } { set _CHIPNAME $CHIPNAME } else { set _CHIPNAME imx51 } # CoreSight Debug Access Port if { [info exists DAP_TAPID ] } { set _DAP_TAPID $DAP_TAPID } else { set _DAP_TAPID 0x1ba00477 } jtag newtap $_CHIPNAME DAP -irlen 4 -ircapture 0x1 -irmask 0xf \ -expected-id $_DAP_TAPID # SDMA / no IDCODE jtag newtap $_CHIPNAME SDMA -irlen 4 -ircapture 0x0 -irmask 0xf # SJC if { [info exists SJC_TAPID ] } { set _SJC_TAPID SJC_TAPID } else { set _SJC_TAPID 0x0190c01d } jtag newtap $_CHIPNAME SJC -irlen 5 -ircapture 0x1 -irmask 0x1f \ -expected-id $_SJC_TAPID # GDB target: Cortex-A8, using DAP set _TARGETNAME $_CHIPNAME.cpu target create $_TARGETNAME cortex_a8 -chain-position $_CHIPNAME.DAP # some TCK tycles are required to activate the DEBUG power domain jtag configure $_CHIPNAME.SJC -event post-reset "runtest 100" # have the DAP "always" be active jtag configure $_CHIPNAME.SJC -event setup "jtag tapenable $_CHIPNAME.DAP" proc imx51_dbginit {target} { # General Cortex A8 debug initialisation cortex_a8 dbginit } # Slow speed to be sure it will work jtag_rclk 1000 $_TARGETNAME configure -event "reset-start" { jtag_rclk 1000 } $_TARGETNAME configure -event reset-assert-post "imx51_dbginit $_TARGETNAME" #-------------------------------------------------------------------------------------------------- If you want I can send a more complete debug log. Thanks Rogerio for help me with IDCODEs. Best Regards, Alan _______________________________________________ Openocd-development mailing list Openocd-development@lists.berlios.de https://lists.berlios.de/mailman/listinfo/openocd-development