Use the correct bitfield to specify the register whose
top halfword gets replaced.
Signed-off-by: David Brownell <dbrown...@users.sourceforge.net>
---
GCC isn't yet smart about using mov+movt for 32-bit constants,
avoiding pipeline hiccups from constant pools, so these are rare.
Patch affects only Thumb2 decode, and doesn't add support for
the ARMv6T2/ARMv7 version of this instruction.
src/target/arm_disassembler.c | 2 +-
1 files changed, 1 insertions(+), 1 deletions(-)
--- a/src/target/arm_disassembler.c
+++ b/src/target/arm_disassembler.c
@@ -3247,7 +3247,7 @@ static int t2ev_data_immed(uint32_t opcode, uint32_t
address,
case 0x0c:
/* move constant to top 16 bits of register */
immed |= (opcode >> 4) & 0xf000;
- sprintf(cp, "MOVT\tr%d, #%d\t; %#4.4x", rn, immed, immed);
+ sprintf(cp, "MOVT\tr%d, #%d\t; %#4.4x", rd, immed, immed);
return ERROR_OK;
case 0x10:
case 0x12:
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