Hi, Magnus! >>>>> "ML" == Magnus Lundin writes:
[...] > > I have a simple "works for me" implementation of memory access with > > cpu instead of AHB and virt2phys using cp15 for cortex_a8, but already > > got a problem with interfaces: there is only one set of functions on > > the high target level and if I switch them to mmu variants, I cannot > > enable debug on omap from tcl config, direct access is required there. > Can you post your virt2phys and read/write memory through cpu. > I think the virt2phys should be added to the trunk as soon as possible, > and it should be in armv7a.c Ok, I'll recheck it. But what do you think about having read/write_phys on target_common_t level? -- WBR, Yauheni Kaliuta _______________________________________________ Openocd-development mailing list Openocd-development@lists.berlios.de https://lists.berlios.de/mailman/listinfo/openocd-development
