On Tuesday 29 September 2009, Magnus Lundin wrote: > +omap3.cpu configure -event reset-start "omap3.cpu mww $PRM_RSTCTRL 2" > +omap3.cpu configure -event reset-end "omap3_dbginit"
Isn't there a chicken/egg thing having "omap3.cpu mww ..." do its thing without having forcibly enabled the TAP, which is done early in omap3_dbginit? I've not tried this patch, but I don't think there's yet a clean way to make the current set of events handle "reset" for OMAP3. But that "proc omap3_reset..." looks good. Also, my copy of the TRM says writing "2" there is a software reset, where normally I'd want more of a cold reset (write "4") to work around "we don't have SRST support". That's why that's there, yes? You're using "2" in part to avoid needing a reset-init handler to set up the DRAM controller, I suspect... I think that's not quite following the model which the code in the src/helper/startup.tcl file is expecting ... a closer match would use reset-assert-pre (or maybe "post") not reset-start. - Dave _______________________________________________ Openocd-development mailing list Openocd-development@lists.berlios.de https://lists.berlios.de/mailman/listinfo/openocd-development
