A patch is needed for MIPS big endian (elf32-tradbigmips) targets. Perhaps I'm
the first to test trunk with a MIPS big endian target.
If "-endian big" is not set in target create, the endianess defaults to little.
mw and md commands will still work, but binary file loads will have the
incorrect word order loaded into memory.
The EJTAG processor access data register (PrAcc) is little endian regardless of
the CPU endianness; it is always loaded LSB first. This is confirmed by the fact
that mips_ejtag_drscan_32() uses buf_set_u32() to load the scan field;
buf_set_u32() is a little-endian formatter. For big endian targets, data buffers
have to be modified so the LSB of each u32 or u16 is at the lower (first) memory
location.
The attached patch for src/target/mips_m4k.c fixes the problem.
Included is a patch for src/target/mips_ejtag.c that fixes the case of a big
endian host. Again it is related to PrAcc. If the drscan out_value word order
is set using buf_set_u32() then it makes sense to also fixup the in_value with
buf_get_u32(); a symmetry argument. This has no affect on little endian hosts.
Index: ./src/target/mips_ejtag.c
===================================================================
--- ./src/target/mips_ejtag.c (revision 2201)
+++ ./src/target/mips_ejtag.c (working copy)
@@ -118,7 +118,7 @@
if (tap==NULL)
return ERROR_FAIL;
scan_field_t field;
- u8 t[4];
+ u8 t[4], r[4];
int retval;
field.tap = tap;
@@ -126,7 +126,7 @@
field.out_value = t;
buf_set_u32(field.out_value, 0, field.num_bits, *data);
- field.in_value = (u8*)data;
+ field.in_value = r;
@@ -139,6 +136,8 @@
return retval;
}
+ *data = buf_get_u32(field.in_value, 0, 32);
+
keep_alive();
return ERROR_OK;
Index: ./src/target/mips_m4k.c
===================================================================
--- ./src/target/mips_m4k.c (revision 2201)
+++ ./src/target/mips_m4k.c (working copy)
@@ -732,6 +732,7 @@
{
mips32_common_t *mips32 = target->arch_info;
mips_ejtag_t *ejtag_info = &mips32->ejtag_info;
+ int retval;
LOG_DEBUG("address: 0x%8.8x, size: 0x%8.8x, count: 0x%8.8x", address, size, count);
@@ -755,22 +756,46 @@
case 1:
/* if noDMA off, use DMAACC mode for memory read */
if(ejtag_info->impcode & EJTAG_IMP_NODMA)
- return mips32_pracc_read_mem(ejtag_info, address, size, count, (void *)buffer);
+ retval = mips32_pracc_read_mem(ejtag_info, address, size, count, (void *)buffer);
else
- return mips32_dmaacc_read_mem(ejtag_info, address, size, count, (void *)buffer);
+ retval = mips32_dmaacc_read_mem(ejtag_info, address, size, count, (void *)buffer);
+ break;
default:
LOG_ERROR("BUG: we shouldn't get here");
exit(-1);
break;
}
- return ERROR_OK;
+ /* TAP data register is loaded LSB first (little endian) */
+ if (target->endianness == TARGET_BIG_ENDIAN)
+ {
+ u32 i, t32;
+ u16 t16;
+
+ for(i = 0; i < (count*size); i += size)
+ {
+ switch(size)
+ {
+ case 4:
+ t32 = le_to_h_u32(&buffer[i]);
+ h_u32_to_be(&buffer[i], t32);
+ break;
+ case 2:
+ t16 = le_to_h_u16(&buffer[i]);
+ h_u16_to_be(&buffer[i], t16);
+ break;
+ }
+ }
+ }
+
+ return retval;
}
int mips_m4k_write_memory(struct target_s *target, u32 address, u32 size, u32 count, u8 *buffer)
{
mips32_common_t *mips32 = target->arch_info;
mips_ejtag_t *ejtag_info = &mips32->ejtag_info;
+ int retval;
LOG_DEBUG("address: 0x%8.8x, size: 0x%8.8x, count: 0x%8.8x", address, size, count);
@@ -793,10 +818,6 @@
case 2:
case 1:
/* if noDMA off, use DMAACC mode for memory write */
- if(ejtag_info->impcode & EJTAG_IMP_NODMA)
- mips32_pracc_write_mem(ejtag_info, address, size, count, (void *)buffer);
- else
- mips32_dmaacc_write_mem(ejtag_info, address, size, count, (void *)buffer);
break;
default:
LOG_ERROR("BUG: we shouldn't get here");
@@ -804,7 +825,35 @@
break;
}
- return ERROR_OK;
+ /* TAP data register is loaded LSB first (little endian) */
+ if (target->endianness == TARGET_BIG_ENDIAN)
+ {
+ u32 i, t32;
+ u16 t16;
+
+ for(i = 0; i < (count*size); i += size)
+ {
+ switch(size)
+ {
+ case 4:
+ t32 = be_to_h_u32(&buffer[i]);
+ h_u32_to_le(&buffer[i], t32);
+ break;
+ case 2:
+ t16 = be_to_h_u16(&buffer[i]);
+ h_u16_to_le(&buffer[i], t16);
+ break;
+ }
+ }
+ }
+
+ if(ejtag_info->impcode & EJTAG_IMP_NODMA)
+ retval = mips32_pracc_write_mem(ejtag_info, address, size, count, (void *)buffer);
+ else
+ retval = mips32_dmaacc_write_mem(ejtag_info, address, size, count, (void *)buffer);
+
+
+ return retval;
}
int mips_m4k_register_commands(struct command_context_s *cmd_ctx)
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