Dirk Behme wrote: > Magnus Lundin wrote: >> tangray wrote: >>> Hi all, >>> >>> I could not enter debug state when I set DRCR[0] to "b1", And I get >>> the DSCR[1:0] value is "b10" >>> any idea? >>> >>> >>> DRCR:Debug Run Control Register >>> >>> DSCR:Debug Status and Control Register >>> >>> these registers is on page 12.4.12 of Cortex-A8 TRM >>> >>> >> The problem is that DBGEN signal must be high, this is external to >> the Cortex-A8 . For OMAP3530 this is controlled from bit 13 in >> 0x5401d030, this found in the OMAP35xx 25.6.4. >> >> mww 0x5401d030 0x00002026 >> >> Then I can actually halt and restart the processor, i run only U-Boot >> and sometimes it crashes and wont but we have halting debug. > > This sounds great! > > I wonder if it makes sense to add the current state to OpenOCD code > and what will be needed for this? I.e. does it already make sense to > add code to OpenOCD (cortex_a8.c?) to be able to connect to OpenOCD by > gdb and to stop/run the target via gdb? This would mean that we move > the code we actually have in TCL script >
It is certainly possbile to start adding to cortex-a8.c but there are some basic designs issues that must be handled in order to reuse as much existing code as possible. There will be i.MX515 to support soon. - Core register structure, that is , architecture, this is very similar to armv4_5, not to cortex-m3/armv7m - Breakpoint and watchpoint handling ?? - Degug interface (arm-adi-v5) - Algorithm support - Cache and MMU support - Romtable and different setup of debug, CoreSight, components So before we rush to quicly into coding, what can be reused, should we make adjustments to existing code or do write new ?? I am still busy learning about this platform and feel I need a week or two befor the picture gets clearer. Best regards, Magnus _______________________________________________ Openocd-development mailing list Openocd-development@lists.berlios.de https://lists.berlios.de/mailman/listinfo/openocd-development
