On 20.03.2019 06:16, Phil Reid wrote:
> On 20/03/2019 11:37 am, Florian Fainelli wrote:
>>
>>
>> On 3/19/2019 7:34 PM, liweihang wrote:
>>> Hi all,
>>>
>>> I've met a similar issue and sent an email to discuss about it before:
>>> Question about setting speed and duplex failed after auto-negotiation 
>>> disabled on marvell phy
>>>
>>> d6ab93364734 net: phy: marvell: Avoid unnecessary soft reset
>>> I reverted this patch and the auto-negotiation works ok.
>>>
>>> Florian, could you please read my previous email and give me some advice?
>>
>> If you can copy the patch author on that email the next time that will
>> help expedite things.
>>
>> So the problem seems to come from the fact that unless the BCMR_RESET
>> bit is written, then m88e1121_config_aneg_rgmii_delays() has no effect,
>> does that sound like what you are observing?
>>
>> Does the following work for you (Phil and yourself)?
>>
>> diff --git a/drivers/net/phy/marvell.c b/drivers/net/phy/marvell.c
>> index 3ccba37bd6dd..6a1ea4c2042a 100644
>> --- a/drivers/net/phy/marvell.c
>> +++ b/drivers/net/phy/marvell.c
>> @@ -448,6 +448,10 @@ static int m88e1121_config_aneg(struct phy_device
>> *phydev)
>>                  err = m88e1121_config_aneg_rgmii_delays(phydev);
>>                  if (err < 0)
>>                          return err;
>> +
>> +               err = genphy_soft_reset(phydev);
>> +               if (err < 0)
>> +                       return err;
>>          }
>>
>>          err = marvell_set_polarity(phydev, phydev->mdix_ctrl);
>>
> 
> 
> G'day Florian,
> 
> Nope that didn't work for me.
> But based on that patch and liweihang email I found the following works for 
> me:
> 
> diff --git a/drivers/net/phy/phy_device.c b/drivers/net/phy/phy_device.c
> index 46c8672..de71aef 100644
> --- a/drivers/net/phy/phy_device.c
> +++ b/drivers/net/phy/phy_device.c
> @@ -1827,7 +1827,13 @@ int genphy_soft_reset(struct phy_device *phydev)
>  {
>         int ret;
> 
> -       ret = phy_write(phydev, MII_BMCR, BMCR_RESET);
> +       phydev_err(phydev, "genphy_soft_reset");
> +
> +       ret = phy_read(phydev, MII_BMCR);
> +       if (ret < 0)
> +               return ret;
> +
> +       ret = phy_write(phydev, MII_BMCR, ret | BMCR_RESET);

Hmm, that would mean in your case some set bit needs to be preserved.
Usually that's not needed. Could you please check which value is read
from MII_BMCR?

>         if (ret < 0)
>                 return ret;
> 
> 
> 
> 
> 
> 
> 
> 

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