Michael Chan wrote:
> On Thu, 2006-03-23 at 14:16 -0800, walt wrote:
>
>> tg3.c:v3.53 (Mar 22, 2006)
>> PCI: Enabling device 0000:00:09.0 (0014 -> 0016)
>> ACPI: PCI Interrupt 0000:00:09.0[A] -> GSI 18 (level, low) -> IRQ 17
>> tg3: Could not obtain valid ethernet address, aborting.
>> ACPI: PCI interrupt for device 0000:00:09.0 disabled
>> tg3: probe of 0000:00:09.0 failed with error -22
>>
>
> These are the patches between 3.52 and 3.53:
>
> [TG3]: Bump driver version and reldate.
> [TG3]: Skip phy power down on some devices
> [TG3]: Fix SRAM access during tg3_init_one()
> [TG3]: Don't mark tg3_test_registers() as returning ...
> [TG3]: make drivers/net/tg3.c:tg3_request_irq() static
> [TG3]: netif_carrier_off runs too early; could still ..
>
> I cannot think of anything in here that can cause MAC address failure on
> your 5702. The 3rd one "Fix SRAM access .." is a remote and only
> possibility. Can you back out that patch to see if it works? ...
Nope, it was the second one: Skip phy power down...
Let me know if can test any patches, etc.
This is the problem code:
$diff -u tg3.c.good tg3.c
--- tg3.c.good 2006-03-23 20:08:55.000000000 -0800
+++ tg3.c 2006-03-24 04:19:59.000000000 -0800
@@ -1148,6 +1148,19 @@
static int tg3_nvram_lock(struct tg3 *);
static void tg3_nvram_unlock(struct tg3 *);
+static void tg3_power_down_phy(struct tg3 *tp)
+{
+ /* The PHY should not be powered down on some chips because
+ * of bugs.
+ */
+ if (GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5700 ||
+ GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5704 ||
+ (GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5780 &&
+ (tp->tg3_flags2 & TG3_FLG2_MII_SERDES)))
+ return;
+ tg3_writephy(tp, MII_BMCR, BMCR_PDOWN);
+}
+
static int tg3_set_power_state(struct tg3 *tp, pci_power_t state)
{
u32 misc_host_ctrl;
@@ -1327,8 +1340,7 @@
tg3_writephy(tp, MII_TG3_EXT_CTRL,
MII_TG3_EXT_CTRL_FORCE_LED_OFF);
tg3_writephy(tp, MII_TG3_AUX_CTRL, 0x01b2);
- if (GET_ASIC_REV(tp->pci_chip_rev_id) !=
ASIC_REV_5700)
- tg3_writephy(tp, MII_BMCR, BMCR_PDOWN);
+ tg3_power_down_phy(tp);
}
}
-
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