On Fri, Feb 27, 2015 at 05:34:46PM +0200, Francisco Jerez wrote:
> And calculate the message response size based on the number of
> components rather than the other way around. This simplifies their
> interface somewhat and allows the caller to request a writeback
> message with more than one vector component in SIMD4x2 mode.
> ---
> src/mesa/drivers/dri/i965/brw_eu.h | 4 ++--
> src/mesa/drivers/dri/i965/brw_eu_emit.c | 30
> +++++++++++++++++++-----
> src/mesa/drivers/dri/i965/brw_fs_generator.cpp | 9 ++++---
> src/mesa/drivers/dri/i965/brw_vec4_generator.cpp | 5 ++--
> 4 files changed, 32 insertions(+), 16 deletions(-)
>
> diff --git a/src/mesa/drivers/dri/i965/brw_eu.h
> b/src/mesa/drivers/dri/i965/brw_eu.h
> index 9b1e0e2..87a9f3f 100644
> --- a/src/mesa/drivers/dri/i965/brw_eu.h
> +++ b/src/mesa/drivers/dri/i965/brw_eu.h
> @@ -403,7 +403,7 @@ brw_untyped_atomic(struct brw_compile *p,
> unsigned atomic_op,
> unsigned bind_table_index,
> unsigned msg_length,
> - unsigned response_length);
> + bool response_expected);
I had to think about this somewhat but after reading the rest of the series
I think this make sense.
Reviewed-by: Topi Pohjolainen <topi.pohjolai...@intel.com>
>
> void
> brw_untyped_surface_read(struct brw_compile *p,
> @@ -411,7 +411,7 @@ brw_untyped_surface_read(struct brw_compile *p,
> struct brw_reg mrf,
> unsigned bind_table_index,
> unsigned msg_length,
> - unsigned response_length);
> + unsigned num_channels);
>
> void
> brw_pixel_interpolator_query(struct brw_compile *p,
> diff --git a/src/mesa/drivers/dri/i965/brw_eu_emit.c
> b/src/mesa/drivers/dri/i965/brw_eu_emit.c
> index cd2ce92..2b1d6ff 100644
> --- a/src/mesa/drivers/dri/i965/brw_eu_emit.c
> +++ b/src/mesa/drivers/dri/i965/brw_eu_emit.c
> @@ -2729,6 +2729,20 @@ brw_svb_write(struct brw_compile *p,
> send_commit_msg); /* send_commit_msg */
> }
>
> +static unsigned
> +brw_surface_payload_size(struct brw_compile *p,
> + unsigned num_channels,
> + bool has_simd4x2,
> + bool has_simd16)
> +{
> + if (has_simd4x2 && brw_inst_access_mode(p->brw, p->current) ==
> BRW_ALIGN_16)
> + return 1;
> + else if (has_simd16 && p->compressed)
> + return 2 * num_channels;
> + else
> + return num_channels;
> +}
> +
> static void
> brw_set_dp_untyped_atomic_message(struct brw_compile *p,
> brw_inst *insn,
> @@ -2782,7 +2796,8 @@ brw_untyped_atomic(struct brw_compile *p,
> unsigned atomic_op,
> unsigned bind_table_index,
> unsigned msg_length,
> - unsigned response_length) {
> + bool response_expected)
> +{
> const struct brw_context *brw = p->brw;
> brw_inst *insn = brw_next_insn(p, BRW_OPCODE_SEND);
>
> @@ -2790,7 +2805,9 @@ brw_untyped_atomic(struct brw_compile *p,
> brw_set_src0(p, insn, retype(payload, BRW_REGISTER_TYPE_UD));
> brw_set_src1(p, insn, brw_imm_d(0));
> brw_set_dp_untyped_atomic_message(
> - p, insn, atomic_op, bind_table_index, msg_length, response_length,
> + p, insn, atomic_op, bind_table_index, msg_length,
> + brw_surface_payload_size(p, response_expected,
> + brw->gen >= 8 || brw->is_haswell, true),
> brw_inst_access_mode(brw, insn) == BRW_ALIGN_1);
> }
>
> @@ -2800,12 +2817,12 @@ brw_set_dp_untyped_surface_read_message(struct
> brw_compile *p,
> unsigned bind_table_index,
> unsigned msg_length,
> unsigned response_length,
> + unsigned num_channels,
> bool header_present)
> {
> const struct brw_context *brw = p->brw;
> const unsigned dispatch_width =
> (brw_inst_exec_size(brw, insn) == BRW_EXECUTE_16 ? 16 : 8);
> - const unsigned num_channels = response_length / (dispatch_width / 8);
>
> if (brw->gen >= 8 || brw->is_haswell) {
> brw_set_message_descriptor(p, insn, HSW_SFID_DATAPORT_DATA_CACHE_1,
> @@ -2843,7 +2860,7 @@ brw_untyped_surface_read(struct brw_compile *p,
> struct brw_reg mrf,
> unsigned bind_table_index,
> unsigned msg_length,
> - unsigned response_length)
> + unsigned num_channels)
> {
> const struct brw_context *brw = p->brw;
> brw_inst *insn = next_insn(p, BRW_OPCODE_SEND);
> @@ -2851,8 +2868,9 @@ brw_untyped_surface_read(struct brw_compile *p,
> brw_set_dest(p, insn, retype(dest, BRW_REGISTER_TYPE_UD));
> brw_set_src0(p, insn, retype(mrf, BRW_REGISTER_TYPE_UD));
> brw_set_dp_untyped_surface_read_message(
> - p, insn, bind_table_index, msg_length, response_length,
> - brw_inst_access_mode(brw, insn) == BRW_ALIGN_1);
> + p, insn, bind_table_index, msg_length,
> + brw_surface_payload_size(p, num_channels, true, true),
> + num_channels, brw_inst_access_mode(brw, insn) == BRW_ALIGN_1);
> }
>
> void
> diff --git a/src/mesa/drivers/dri/i965/brw_fs_generator.cpp
> b/src/mesa/drivers/dri/i965/brw_fs_generator.cpp
> index 63c59a5..2fdc3df 100644
> --- a/src/mesa/drivers/dri/i965/brw_fs_generator.cpp
> +++ b/src/mesa/drivers/dri/i965/brw_fs_generator.cpp
> @@ -1428,8 +1428,9 @@ fs_generator::generate_untyped_atomic(fs_inst *inst,
> struct brw_reg dst,
> surf_index.file == BRW_IMMEDIATE_VALUE &&
> surf_index.type == BRW_REGISTER_TYPE_UD);
>
> - brw_untyped_atomic(p, dst, payload, atomic_op.dw1.ud, surf_index.dw1.ud,
> - inst->mlen, inst->exec_size / 8);
> + brw_untyped_atomic(p, dst, payload,
> + atomic_op.dw1.ud, surf_index.dw1.ud,
> + inst->mlen, true);
>
> brw_mark_surface_used(prog_data, surf_index.dw1.ud);
> }
> @@ -1442,9 +1443,7 @@ fs_generator::generate_untyped_surface_read(fs_inst
> *inst, struct brw_reg dst,
> assert(surf_index.file == BRW_IMMEDIATE_VALUE &&
> surf_index.type == BRW_REGISTER_TYPE_UD);
>
> - brw_untyped_surface_read(p, dst, payload,
> - surf_index.dw1.ud,
> - inst->mlen, inst->exec_size / 8);
> + brw_untyped_surface_read(p, dst, payload, surf_index.dw1.ud, inst->mlen,
> 1);
>
> brw_mark_surface_used(prog_data, surf_index.dw1.ud);
> }
> diff --git a/src/mesa/drivers/dri/i965/brw_vec4_generator.cpp
> b/src/mesa/drivers/dri/i965/brw_vec4_generator.cpp
> index c7494e5..467da2d 100644
> --- a/src/mesa/drivers/dri/i965/brw_vec4_generator.cpp
> +++ b/src/mesa/drivers/dri/i965/brw_vec4_generator.cpp
> @@ -1117,7 +1117,7 @@
> vec4_generator::generate_untyped_atomic(vec4_instruction *inst,
>
> brw_untyped_atomic(p, dst, brw_message_reg(inst->base_mrf),
> atomic_op.dw1.ud, surf_index.dw1.ud,
> - inst->mlen, 1);
> + inst->mlen, true);
>
> brw_mark_surface_used(&prog_data->base, surf_index.dw1.ud);
> }
> @@ -1131,8 +1131,7 @@
> vec4_generator::generate_untyped_surface_read(vec4_instruction *inst,
> surf_index.type == BRW_REGISTER_TYPE_UD);
>
> brw_untyped_surface_read(p, dst, brw_message_reg(inst->base_mrf),
> - surf_index.dw1.ud,
> - inst->mlen, 1);
> + surf_index.dw1.ud, inst->mlen, 1);
>
> brw_mark_surface_used(&prog_data->base, surf_index.dw1.ud);
> }
> --
> 2.1.3
>
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