"Pohjolainen, Topi" <topi.pohjolai...@intel.com> writes: > On Fri, Feb 27, 2015 at 05:34:51PM +0200, Francisco Jerez wrote: >> This doesn't actually enable untyped surface message sends from GRF >> yet, the upcoming atomic counter and image intrinsic lowering code >> will. >> --- >> src/mesa/drivers/dri/i965/brw_vec4.cpp | 7 ++++--- >> src/mesa/drivers/dri/i965/brw_vec4_generator.cpp | 16 +++++++--------- >> src/mesa/drivers/dri/i965/brw_vec4_visitor.cpp | 5 +++-- >> 3 files changed, 14 insertions(+), 14 deletions(-) >> >> diff --git a/src/mesa/drivers/dri/i965/brw_vec4.cpp >> b/src/mesa/drivers/dri/i965/brw_vec4.cpp >> index e144449..0004b10 100644 >> --- a/src/mesa/drivers/dri/i965/brw_vec4.cpp >> +++ b/src/mesa/drivers/dri/i965/brw_vec4.cpp >> @@ -256,6 +256,8 @@ vec4_instruction::is_send_from_grf() >> switch (opcode) { >> case SHADER_OPCODE_SHADER_TIME_ADD: >> case VS_OPCODE_PULL_CONSTANT_LOAD_GEN7: >> + case SHADER_OPCODE_UNTYPED_ATOMIC: >> + case SHADER_OPCODE_UNTYPED_SURFACE_READ: >> return true; >> default: >> return false; >> @@ -270,6 +272,8 @@ vec4_instruction::regs_read(unsigned arg) const >> >> switch (opcode) { >> case SHADER_OPCODE_SHADER_TIME_ADD: >> + case SHADER_OPCODE_UNTYPED_ATOMIC: >> + case SHADER_OPCODE_UNTYPED_SURFACE_READ: >> return arg == 0 ? mlen : 1; > > Before the logic always falled back to returning one. Now we may return > one, two or three I think. I may be mistaken though, I'm just reading > vec4_visitor::emit_untyped_atomic() and it can produce message lengths up > to three. > Does this effect the instruction scheduling logic and if not, can you > explain why not? >
Before my change that wouldn't ever happen because we were using fake MRFs to assemble the message payload and the MRF register index would be specified as inst->base_mrf, so the payload wouldn't be an actual source of the untyped surface instruction. This change adds an additional source for the payload, but a fake MRF is still passed in as explicit source temporarily. A future commit will change the vec4 visitor to build untyped and typed surface message payloads directly in normal GRFs instead of fake MRFs. >> >> case VS_OPCODE_PULL_CONSTANT_LOAD_GEN7: >> @@ -347,9 +351,6 @@ vec4_visitor::implied_mrf_writes(vec4_instruction *inst) >> case SHADER_OPCODE_TG4: >> case SHADER_OPCODE_TG4_OFFSET: >> return inst->header_present ? 1 : 0; >> - case SHADER_OPCODE_UNTYPED_ATOMIC: >> - case SHADER_OPCODE_UNTYPED_SURFACE_READ: >> - return 0; >> default: >> unreachable("not reached"); >> } >> diff --git a/src/mesa/drivers/dri/i965/brw_vec4_generator.cpp >> b/src/mesa/drivers/dri/i965/brw_vec4_generator.cpp >> index 22fdd63..ef0cde9 100644 >> --- a/src/mesa/drivers/dri/i965/brw_vec4_generator.cpp >> +++ b/src/mesa/drivers/dri/i965/brw_vec4_generator.cpp >> @@ -1459,19 +1459,17 @@ vec4_generator::generate_code(const cfg_t *cfg) >> break; >> >> case SHADER_OPCODE_UNTYPED_ATOMIC: >> - assert(src[0].file == BRW_IMMEDIATE_VALUE && >> - src[1].file == BRW_IMMEDIATE_VALUE); >> - brw_untyped_atomic(p, dst, brw_message_reg(inst->base_mrf), >> - src[1], src[0].dw1.ud, inst->mlen, >> + assert(src[1].file == BRW_IMMEDIATE_VALUE && >> + src[2].file == BRW_IMMEDIATE_VALUE); >> + brw_untyped_atomic(p, dst, src[0], src[2], src[1].dw1.ud, >> inst->mlen, >> !inst->dst.is_null()); >> - brw_mark_surface_used(&prog_data->base, src[1].dw1.ud); >> + brw_mark_surface_used(&prog_data->base, src[2].dw1.ud); >> break; >> >> case SHADER_OPCODE_UNTYPED_SURFACE_READ: >> - assert(src[0].file == BRW_IMMEDIATE_VALUE); >> - brw_untyped_surface_read(p, dst, brw_message_reg(inst->base_mrf), >> - src[0], inst->mlen, 1); >> - brw_mark_surface_used(&prog_data->base, src[0].dw1.ud); >> + assert(src[1].file == BRW_IMMEDIATE_VALUE); >> + brw_untyped_surface_read(p, dst, src[0], src[1], inst->mlen, 1); >> + brw_mark_surface_used(&prog_data->base, src[1].dw1.ud); >> break; >> >> case SHADER_OPCODE_FIND_LIVE_CHANNEL: >> diff --git a/src/mesa/drivers/dri/i965/brw_vec4_visitor.cpp >> b/src/mesa/drivers/dri/i965/brw_vec4_visitor.cpp >> index f25bff9..b8cfe8f 100644 >> --- a/src/mesa/drivers/dri/i965/brw_vec4_visitor.cpp >> +++ b/src/mesa/drivers/dri/i965/brw_vec4_visitor.cpp >> @@ -2953,6 +2953,7 @@ vec4_visitor::emit_untyped_atomic(unsigned atomic_op, >> unsigned surf_index, >> * unused channels will be masked out. >> */ >> vec4_instruction *inst = emit(SHADER_OPCODE_UNTYPED_ATOMIC, dst, >> + brw_message_reg(0), >> src_reg(atomic_op), src_reg(surf_index)); >> inst->base_mrf = 0; >> inst->mlen = mlen; >> @@ -2969,8 +2970,8 @@ vec4_visitor::emit_untyped_surface_read(unsigned >> surf_index, dst_reg dst, >> * untyped surface read message, but that's OK because unused >> * channels will be masked out. >> */ >> - vec4_instruction *inst = emit(SHADER_OPCODE_UNTYPED_SURFACE_READ, >> - dst, src_reg(surf_index)); >> + vec4_instruction *inst = emit(SHADER_OPCODE_UNTYPED_SURFACE_READ, dst, >> + brw_message_reg(0), src_reg(surf_index)); >> inst->base_mrf = 0; >> inst->mlen = 1; >> } >> -- >> 2.1.3 >> >> _______________________________________________ >> mesa-dev mailing list >> mesa-dev@lists.freedesktop.org >> http://lists.freedesktop.org/mailman/listinfo/mesa-dev
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