On Friday, January 30, 2015 03:54:28 PM Matt Turner wrote:
> ---
> src/mesa/drivers/dri/i965/brw_shader.cpp | 5 +----
> 1 file changed, 1 insertion(+), 4 deletions(-)
>
> diff --git a/src/mesa/drivers/dri/i965/brw_shader.cpp
> b/src/mesa/drivers/dri/i965/brw_shader.cpp
> index 678390e..c393bfc 100644
> --- a/src/mesa/drivers/dri/i965/brw_shader.cpp
> +++ b/src/mesa/drivers/dri/i965/brw_shader.cpp
> @@ -602,11 +602,8 @@ brw_saturate_immediate(enum brw_reg_type type, struct
> brw_reg *reg)
> sat_imm.f = CLAMP(imm.f, 0.0f, 1.0f);
> break;
> case BRW_REGISTER_TYPE_UB:
> - sat_imm.ud = CLAMP(imm.ud, 0, UCHAR_MAX);
> - break;
> case BRW_REGISTER_TYPE_B:
> - sat_imm.d = CLAMP(imm.d, CHAR_MIN, CHAR_MAX);
> - break;
> + unreachable("no UB/B immediates");
> case BRW_REGISTER_TYPE_V:
> case BRW_REGISTER_TYPE_UV:
> case BRW_REGISTER_TYPE_VF:
> Please justify this change in your commit message - it's not immediately obvious. Does the GPU not allow saturate on B/UB values?
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