These are obviously the gaps already, due to the bare numbers with
unsupported implementations.

This makes inserting new gaps less irritating.
---
 src/gallium/drivers/r600/r600_shader.c | 19 -------------------
 1 file changed, 19 deletions(-)

diff --git a/src/gallium/drivers/r600/r600_shader.c 
b/src/gallium/drivers/r600/r600_shader.c
index aab4215..59d9a46 100644
--- a/src/gallium/drivers/r600/r600_shader.c
+++ b/src/gallium/drivers/r600/r600_shader.c
@@ -7156,7 +7156,6 @@ static struct r600_shader_tgsi_instruction 
r600_shader_tgsi_instruction[] = {
        {TGSI_OPCODE_CND,       0, ALU_OP0_NOP, tgsi_unsupported},
        {TGSI_OPCODE_SQRT,      0, ALU_OP1_SQRT_IEEE, 
tgsi_trans_srcx_replicate},
        {TGSI_OPCODE_DP2A,      0, ALU_OP0_NOP, tgsi_unsupported},
-       /* gap */
        {22,                    0, ALU_OP0_NOP, tgsi_unsupported},
        {23,                    0, ALU_OP0_NOP, tgsi_unsupported},
        {TGSI_OPCODE_FRC,       0, ALU_OP1_FRACT, tgsi_op2},
@@ -7167,7 +7166,6 @@ static struct r600_shader_tgsi_instruction 
r600_shader_tgsi_instruction[] = {
        {TGSI_OPCODE_LG2,       0, ALU_OP1_LOG_IEEE, tgsi_trans_srcx_replicate},
        {TGSI_OPCODE_POW,       0, ALU_OP0_NOP, tgsi_pow},
        {TGSI_OPCODE_XPD,       0, ALU_OP0_NOP, tgsi_xpd},
-       /* gap */
        {32,                    0, ALU_OP0_NOP, tgsi_unsupported},
        {TGSI_OPCODE_ABS,       0, ALU_OP1_MOV, tgsi_op2},
        {TGSI_OPCODE_RCC,       0, ALU_OP0_NOP, tgsi_unsupported},
@@ -7224,7 +7222,6 @@ static struct r600_shader_tgsi_instruction 
r600_shader_tgsi_instruction[] = {
        {TGSI_OPCODE_NOT,       0, ALU_OP1_NOT_INT, tgsi_op2},
        {TGSI_OPCODE_TRUNC,     0, ALU_OP1_TRUNC, tgsi_op2},
        {TGSI_OPCODE_SHL,       0, ALU_OP2_LSHL_INT, tgsi_op2_trans},
-       /* gap */
        {88,                    0, ALU_OP0_NOP, tgsi_unsupported},
        {TGSI_OPCODE_AND,       0, ALU_OP2_AND_INT, tgsi_op2},
        {TGSI_OPCODE_OR,        0, ALU_OP2_OR_INT, tgsi_op2},
@@ -7241,7 +7238,6 @@ static struct r600_shader_tgsi_instruction 
r600_shader_tgsi_instruction[] = {
        {TGSI_OPCODE_ENDLOOP,   0, ALU_OP0_NOP, tgsi_endloop},
        {TGSI_OPCODE_ENDSUB,    0, ALU_OP0_NOP, tgsi_unsupported},
        {TGSI_OPCODE_TXQ_LZ,    0, FETCH_OP_GET_TEXTURE_RESINFO, tgsi_tex},
-       /* gap */
        {104,                   0, ALU_OP0_NOP, tgsi_unsupported},
        {105,                   0, ALU_OP0_NOP, tgsi_unsupported},
        {106,                   0, ALU_OP0_NOP, tgsi_unsupported},
@@ -7252,12 +7248,10 @@ static struct r600_shader_tgsi_instruction 
r600_shader_tgsi_instruction[] = {
        {TGSI_OPCODE_FSNE,      0, ALU_OP2_SETNE_DX10, tgsi_op2_swap},
        {TGSI_OPCODE_NRM4,      0, ALU_OP0_NOP, tgsi_unsupported},
        {TGSI_OPCODE_CALLNZ,    0, ALU_OP0_NOP, tgsi_unsupported},
-       /* gap */
        {114,                   0, ALU_OP0_NOP, tgsi_unsupported},
        {TGSI_OPCODE_BREAKC,    0, ALU_OP0_NOP, tgsi_loop_breakc},
        {TGSI_OPCODE_KILL_IF,   0, ALU_OP2_KILLGT, tgsi_kill},  /* conditional 
kill */
        {TGSI_OPCODE_END,       0, ALU_OP0_NOP, tgsi_end},  /* aka HALT */
-       /* gap */
        {118,                   0, ALU_OP0_NOP, tgsi_unsupported},
        {TGSI_OPCODE_F2I,       0, ALU_OP1_FLT_TO_INT, tgsi_op2_trans},
        {TGSI_OPCODE_IDIV,      0, ALU_OP0_NOP, tgsi_idiv},
@@ -7361,7 +7355,6 @@ static struct r600_shader_tgsi_instruction 
eg_shader_tgsi_instruction[] = {
        {TGSI_OPCODE_CND,       0, ALU_OP0_NOP, tgsi_unsupported},
        {TGSI_OPCODE_SQRT,      0, ALU_OP1_SQRT_IEEE, 
tgsi_trans_srcx_replicate},
        {TGSI_OPCODE_DP2A,      0, ALU_OP0_NOP, tgsi_unsupported},
-       /* gap */
        {22,                    0, ALU_OP0_NOP, tgsi_unsupported},
        {23,                    0, ALU_OP0_NOP, tgsi_unsupported},
        {TGSI_OPCODE_FRC,       0, ALU_OP1_FRACT, tgsi_op2},
@@ -7372,7 +7365,6 @@ static struct r600_shader_tgsi_instruction 
eg_shader_tgsi_instruction[] = {
        {TGSI_OPCODE_LG2,       0, ALU_OP1_LOG_IEEE, tgsi_trans_srcx_replicate},
        {TGSI_OPCODE_POW,       0, ALU_OP0_NOP, tgsi_pow},
        {TGSI_OPCODE_XPD,       0, ALU_OP0_NOP, tgsi_xpd},
-       /* gap */
        {32,                    0, ALU_OP0_NOP, tgsi_unsupported},
        {TGSI_OPCODE_ABS,       0, ALU_OP1_MOV, tgsi_op2},
        {TGSI_OPCODE_RCC,       0, ALU_OP0_NOP, tgsi_unsupported},
@@ -7429,7 +7421,6 @@ static struct r600_shader_tgsi_instruction 
eg_shader_tgsi_instruction[] = {
        {TGSI_OPCODE_NOT,       0, ALU_OP1_NOT_INT, tgsi_op2},
        {TGSI_OPCODE_TRUNC,     0, ALU_OP1_TRUNC, tgsi_op2},
        {TGSI_OPCODE_SHL,       0, ALU_OP2_LSHL_INT, tgsi_op2},
-       /* gap */
        {88,                    0, ALU_OP0_NOP, tgsi_unsupported},
        {TGSI_OPCODE_AND,       0, ALU_OP2_AND_INT, tgsi_op2},
        {TGSI_OPCODE_OR,        0, ALU_OP2_OR_INT, tgsi_op2},
@@ -7446,7 +7437,6 @@ static struct r600_shader_tgsi_instruction 
eg_shader_tgsi_instruction[] = {
        {TGSI_OPCODE_ENDLOOP,   0, ALU_OP0_NOP, tgsi_endloop},
        {TGSI_OPCODE_ENDSUB,    0, ALU_OP0_NOP, tgsi_unsupported},
        {TGSI_OPCODE_TXQ_LZ,    0, FETCH_OP_GET_TEXTURE_RESINFO, tgsi_tex},
-       /* gap */
        {104,                   0, ALU_OP0_NOP, tgsi_unsupported},
        {105,                   0, ALU_OP0_NOP, tgsi_unsupported},
        {106,                   0, ALU_OP0_NOP, tgsi_unsupported},
@@ -7457,12 +7447,10 @@ static struct r600_shader_tgsi_instruction 
eg_shader_tgsi_instruction[] = {
        {TGSI_OPCODE_FSNE,      0, ALU_OP2_SETNE_DX10, tgsi_op2_swap},
        {TGSI_OPCODE_NRM4,      0, ALU_OP0_NOP, tgsi_unsupported},
        {TGSI_OPCODE_CALLNZ,    0, ALU_OP0_NOP, tgsi_unsupported},
-       /* gap */
        {114,                   0, ALU_OP0_NOP, tgsi_unsupported},
        {TGSI_OPCODE_BREAKC,    0, ALU_OP0_NOP, tgsi_unsupported},
        {TGSI_OPCODE_KILL_IF,   0, ALU_OP2_KILLGT, tgsi_kill},  /* conditional 
kill */
        {TGSI_OPCODE_END,       0, ALU_OP0_NOP, tgsi_end},  /* aka HALT */
-       /* gap */
        {118,                   0, ALU_OP0_NOP, tgsi_unsupported},
        {TGSI_OPCODE_F2I,       0, ALU_OP1_FLT_TO_INT, tgsi_f2i},
        {TGSI_OPCODE_IDIV,      0, ALU_OP0_NOP, tgsi_idiv},
@@ -7566,7 +7554,6 @@ static struct r600_shader_tgsi_instruction 
cm_shader_tgsi_instruction[] = {
        {TGSI_OPCODE_CND,       0, ALU_OP0_NOP, tgsi_unsupported},
        {TGSI_OPCODE_SQRT,      0, ALU_OP1_SQRT_IEEE, cayman_emit_float_instr},
        {TGSI_OPCODE_DP2A,      0, ALU_OP0_NOP, tgsi_unsupported},
-       /* gap */
        {22,                    0, ALU_OP0_NOP, tgsi_unsupported},
        {23,                    0, ALU_OP0_NOP, tgsi_unsupported},
        {TGSI_OPCODE_FRC,       0, ALU_OP1_FRACT, tgsi_op2},
@@ -7577,7 +7564,6 @@ static struct r600_shader_tgsi_instruction 
cm_shader_tgsi_instruction[] = {
        {TGSI_OPCODE_LG2,       0, ALU_OP1_LOG_IEEE, cayman_emit_float_instr},
        {TGSI_OPCODE_POW,       0, ALU_OP0_NOP, cayman_pow},
        {TGSI_OPCODE_XPD,       0, ALU_OP0_NOP, tgsi_xpd},
-       /* gap */
        {32,                    0, ALU_OP0_NOP, tgsi_unsupported},
        {TGSI_OPCODE_ABS,       0, ALU_OP1_MOV, tgsi_op2},
        {TGSI_OPCODE_RCC,       0, ALU_OP0_NOP, tgsi_unsupported},
@@ -7634,7 +7620,6 @@ static struct r600_shader_tgsi_instruction 
cm_shader_tgsi_instruction[] = {
        {TGSI_OPCODE_NOT,       0, ALU_OP1_NOT_INT, tgsi_op2},
        {TGSI_OPCODE_TRUNC,     0, ALU_OP1_TRUNC, tgsi_op2},
        {TGSI_OPCODE_SHL,       0, ALU_OP2_LSHL_INT, tgsi_op2},
-       /* gap */
        {88,                    0, ALU_OP0_NOP, tgsi_unsupported},
        {TGSI_OPCODE_AND,       0, ALU_OP2_AND_INT, tgsi_op2},
        {TGSI_OPCODE_OR,        0, ALU_OP2_OR_INT, tgsi_op2},
@@ -7651,24 +7636,20 @@ static struct r600_shader_tgsi_instruction 
cm_shader_tgsi_instruction[] = {
        {TGSI_OPCODE_ENDLOOP,   0, ALU_OP0_NOP, tgsi_endloop},
        {TGSI_OPCODE_ENDSUB,    0, ALU_OP0_NOP, tgsi_unsupported},
        {TGSI_OPCODE_TXQ_LZ,    0, FETCH_OP_GET_TEXTURE_RESINFO, tgsi_tex},
-       /* gap */
        {104,                   0, ALU_OP0_NOP, tgsi_unsupported},
        {105,                   0, ALU_OP0_NOP, tgsi_unsupported},
        {106,                   0, ALU_OP0_NOP, tgsi_unsupported},
        {TGSI_OPCODE_NOP,       0, ALU_OP0_NOP, tgsi_unsupported},
-       /* gap */
        {TGSI_OPCODE_FSEQ,      0, ALU_OP2_SETE_DX10, tgsi_op2},
        {TGSI_OPCODE_FSGE,      0, ALU_OP2_SETGE_DX10, tgsi_op2},
        {TGSI_OPCODE_FSLT,      0, ALU_OP2_SETGT_DX10, tgsi_op2_swap},
        {TGSI_OPCODE_FSNE,      0, ALU_OP2_SETNE_DX10, tgsi_op2_swap},
        {TGSI_OPCODE_NRM4,      0, ALU_OP0_NOP, tgsi_unsupported},
        {TGSI_OPCODE_CALLNZ,    0, ALU_OP0_NOP, tgsi_unsupported},
-       /* gap */
        {114,                   0, ALU_OP0_NOP, tgsi_unsupported},
        {TGSI_OPCODE_BREAKC,    0, ALU_OP0_NOP, tgsi_unsupported},
        {TGSI_OPCODE_KILL_IF,   0, ALU_OP2_KILLGT, tgsi_kill},  /* conditional 
kill */
        {TGSI_OPCODE_END,       0, ALU_OP0_NOP, tgsi_end},  /* aka HALT */
-       /* gap */
        {118,                   0, ALU_OP0_NOP, tgsi_unsupported},
        {TGSI_OPCODE_F2I,       0, ALU_OP1_FLT_TO_INT, tgsi_op2},
        {TGSI_OPCODE_IDIV,      0, ALU_OP0_NOP, tgsi_idiv},
-- 
2.1.1

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