Reviewed-by: Marek Olšák <marek.ol...@amd.com>
Marek
On Thu, Aug 28, 2014 at 6:44 AM, Jordan Justen
<jordan.l.jus...@intel.com> wrote:
> i965 will have more than 32 bits when BRW_STATE_COMPUTE_PROGRAM is added.
>
> Signed-off-by: Jordan Justen <jordan.l.jus...@intel.com>
> ---
> Ken,
>
> How about this to replace "i965: Convert brw state dirty bits to
> 64-bits"?
>
> -Jordan
>
> src/mesa/drivers/dri/i965/brw_blorp.cpp | 2 +-
> src/mesa/drivers/dri/i965/brw_context.h | 14 +++++++++++++-
> src/mesa/drivers/dri/i965/brw_state_cache.c | 2 +-
> src/mesa/drivers/dri/i965/brw_state_upload.c | 2 +-
> src/mesa/main/mtypes.h | 16 ++++++++--------
> src/mesa/state_tracker/st_context.h | 2 +-
> 6 files changed, 25 insertions(+), 13 deletions(-)
>
> diff --git a/src/mesa/drivers/dri/i965/brw_blorp.cpp
> b/src/mesa/drivers/dri/i965/brw_blorp.cpp
> index c5cc823..17ae2bf 100644
> --- a/src/mesa/drivers/dri/i965/brw_blorp.cpp
> +++ b/src/mesa/drivers/dri/i965/brw_blorp.cpp
> @@ -273,7 +273,7 @@ retry:
> /* We've smashed all state compared to what the normal 3D pipeline
> * rendering tracks for GL.
> */
> - SET_DIRTY_ALL(brw);
> + SET_DIRTY64_ALL(brw);
> SET_DIRTY_ALL(cache);
> brw->no_depth_or_stencil = false;
> brw->ib.type = -1;
> diff --git a/src/mesa/drivers/dri/i965/brw_context.h
> b/src/mesa/drivers/dri/i965/brw_context.h
> index 13403f5..ef68c53 100644
> --- a/src/mesa/drivers/dri/i965/brw_context.h
> +++ b/src/mesa/drivers/dri/i965/brw_context.h
> @@ -229,7 +229,7 @@ struct brw_state_flags {
> /**
> * State update flags signalled as the result of brw_tracked_state updates
> */
> - GLuint brw;
> + uint64_t brw;
> /**
> * State update flags that used to be signalled by brw_state_cache.c
> * searches.
> @@ -283,6 +283,18 @@ typedef enum {
>
>
> /**
> + * Set all of the bits in a field of brw_state_flags.
> + */
> +#define SET_DIRTY64_ALL(FIELD) \
> + do { \
> + /* ~0ULL == 0xffffffffffffffff, so make sure field is <= 64 bits */ \
> + STATIC_ASSERT(sizeof(brw->state.pipeline_dirty[0].FIELD) == 8); \
> + for (int pipeline = 0; pipeline < BRW_NUM_PIPELINES; pipeline++) \
> + brw->state.pipeline_dirty[pipeline].FIELD = ~(0ULL); \
> + } while (false)
> +
> +
> +/**
> * Check one of the bits in a field of brw_state_flags.
> */
> #define CHECK_DIRTY_BIT(FIELD, FLAG) \
> diff --git a/src/mesa/drivers/dri/i965/brw_state_cache.c
> b/src/mesa/drivers/dri/i965/brw_state_cache.c
> index fcb7277..19079c8 100644
> --- a/src/mesa/drivers/dri/i965/brw_state_cache.c
> +++ b/src/mesa/drivers/dri/i965/brw_state_cache.c
> @@ -380,7 +380,7 @@ brw_clear_cache(struct brw_context *brw, struct brw_cache
> *cache)
> * any offsets leftover in brw_context will no longer be valid.
> */
> SET_DIRTY_ALL(mesa);
> - SET_DIRTY_ALL(brw);
> + SET_DIRTY64_ALL(brw);
> SET_DIRTY_ALL(cache);
> intel_batchbuffer_flush(brw);
> }
> diff --git a/src/mesa/drivers/dri/i965/brw_state_upload.c
> b/src/mesa/drivers/dri/i965/brw_state_upload.c
> index 3022ab1..9d93431 100644
> --- a/src/mesa/drivers/dri/i965/brw_state_upload.c
> +++ b/src/mesa/drivers/dri/i965/brw_state_upload.c
> @@ -391,7 +391,7 @@ void brw_init_state( struct brw_context *brw )
> brw_upload_initial_gpu_state(brw);
>
> SET_DIRTY_ALL(mesa);
> - SET_DIRTY_ALL(brw);
> + SET_DIRTY64_ALL(brw);
>
> /* Make sure that brw->state.dirty.brw has enough bits to hold all
> possible
> * dirty flags.
> diff --git a/src/mesa/main/mtypes.h b/src/mesa/main/mtypes.h
> index cb2a4df..c84d1ea 100644
> --- a/src/mesa/main/mtypes.h
> +++ b/src/mesa/main/mtypes.h
> @@ -3908,32 +3908,32 @@ typedef enum
> struct gl_driver_flags
> {
> /** gl_context::Array::_DrawArrays (vertex array state) */
> - GLbitfield NewArray;
> + uint64_t NewArray;
>
> /** gl_context::TransformFeedback::CurrentObject */
> - GLbitfield NewTransformFeedback;
> + uint64_t NewTransformFeedback;
>
> /** gl_context::TransformFeedback::CurrentObject::shader_program */
> - GLbitfield NewTransformFeedbackProg;
> + uint64_t NewTransformFeedbackProg;
>
> /** gl_context::RasterDiscard */
> - GLbitfield NewRasterizerDiscard;
> + uint64_t NewRasterizerDiscard;
>
> /**
> * gl_context::UniformBufferBindings
> * gl_shader_program::UniformBlocks
> */
> - GLbitfield NewUniformBuffer;
> + uint64_t NewUniformBuffer;
>
> /**
> * gl_context::AtomicBufferBindings
> */
> - GLbitfield NewAtomicBuffer;
> + uint64_t NewAtomicBuffer;
>
> /**
> * gl_context::ImageUnits
> */
> - GLbitfield NewImageUnits;
> + uint64_t NewImageUnits;
> };
>
> struct gl_uniform_buffer_binding
> @@ -4240,7 +4240,7 @@ struct gl_context
>
> GLenum RenderMode; /**< either GL_RENDER, GL_SELECT, GL_FEEDBACK */
> GLbitfield NewState; /**< bitwise-or of _NEW_* flags */
> - GLbitfield NewDriverState;/**< bitwise-or of flags from DriverFlags */
> + uint64_t NewDriverState; /**< bitwise-or of flags from DriverFlags */
>
> struct gl_driver_flags DriverFlags;
>
> diff --git a/src/mesa/state_tracker/st_context.h
> b/src/mesa/state_tracker/st_context.h
> index 6d572bd..58f14f9 100644
> --- a/src/mesa/state_tracker/st_context.h
> +++ b/src/mesa/state_tracker/st_context.h
> @@ -56,7 +56,7 @@ struct u_upload_mgr;
>
> struct st_state_flags {
> GLuint mesa;
> - GLuint st;
> + uint64_t st;
> };
>
> struct st_tracked_state {
> --
> 2.1.0
>
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