On 01/17/2014 01:57 PM, Chris Forbes wrote: > Ken, > > Assuming the caches don't completely derail things, you ought to be > able to make this work with pretty minimal impact: > > - Keep the low four bits of the sampler index where they are > - If the 5th bit is set: > - Force message header on > - Add 16*sizeof(sampler_state) to the copy of r0.3 in the header.
Hey, thanks! I forgot we get a copy of the sampler state table pointer in the r0.3 header. With that, it's totally easy. The one sad thing is that the message header field only exists on Haswell+. It's documented in the Ivybridge PRM, but empirically the PRM appears to be flat wrong. Ah well...new features on new hardware, I guess. > We already mangle the copy of r0.2 in various ways for offsetting / > channel select so this isn't a huge change. > > With 4.0/ARB_gpu_shader5 you need to emit conditional code in some > cases since you don't always know the sampler index at compile time, > but it's still pretty manageable. > > -- Chris _______________________________________________ mesa-dev mailing list mesa-dev@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/mesa-dev
