https://bugs.freedesktop.org/show_bug.cgi?id=66806
--- Comment #2 from José Fonseca <jfons...@vmware.com> --- Indeed http://software.intel.com/en-us/articles/x87-and-sse-floating-point-assists-in-ia-32-flush-to-zero-ftz-and-denormals-are-zero-daz suggests to mask certain exceptions together with the FTZ/DAZ bits: // UNDERFLOWS set_mxcsr_on(FTZ_BIT); set_mxcsr_off(UNDERFLOW_EXCEPTION_MASK); make_denormal(); clear_flags(); // DENORMALS set_mxcsr_off(DAZ_BIT); set_mxcsr_on(DENORMAL_EXCEPTION_MASK); make_denormal(); clear_flags(); So we should probably do the same. -- You are receiving this mail because: You are the assignee for the bug.
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