On 07/10/2013 11:09 AM, Paul Berry wrote:
On 9 July 2013 18:12, Anuj Phogat <anuj.pho...@gmail.com
<mailto:anuj.pho...@gmail.com>> wrote:
For HSW GT3 clear rectangle must be aligned to two times the number of
pixels in the table shown in Ivy Bridge PRM, Vol2 Part1 11.7.
It should be safe to do this for all gen7 systems unless we see any
performance regressions. I observed no piglit, gles3conform regressions
with this patch.
I realize it was my idea to do this for all Gen7 systems, but on further
reflection, it's so easy to restrict this workaround to just HSW GT3
that I think we should go ahead and do that. Along the lines of Chris
Forbes' suggestion, the code would look something like:
if (brw->is_haswell && brw->gt == 3) {
/* rationale ... */
x0 = ROUND_DOWN_TO(x0, 2 * x_align);
y0 = ROUND_DOWN_TO(y0, 2 * y_align);
x1 = ALIGN(x1, 2 * x_align);
y1 = ALIGN(y1, 2 * y_align);
} else {
x0 = ROUND_DOWN_TO(x0, x_align);
y0 = ROUND_DOWN_TO(y0, y_align);
x1 = ALIGN(x1, x_align);
y1 = ALIGN(y1, y_align);
}
Yes, I like this much better. It's confusing to apply workarounds to
platforms that don't need them, and maybe even harmful. The gen and gt
fields are designed to make things like this easy.
For rationale you can put:
/* From the BSpec: 3D-Media-GPGPU Engine > 3D Pipeline > Pixel > Pixel
* Backend > MCS Buffer for Render Target(s) [DevIVB+]:
*
* [DevHSW:GT3]: Clear rectangle must be aligned to two times the
* number of pixels in the table shown below...
*
* The table referred to is implemented by
* intel_get_non_msrt_mcs_alignment().
*/
This at least shows that hardware documentation exists which supports
this code. When the Haswell PRMs come out, we can go through and
replace BSpec references with PRM references so everyone can find them.
--Ken
_______________________________________________
mesa-dev mailing list
mesa-dev@lists.freedesktop.org
http://lists.freedesktop.org/mailman/listinfo/mesa-dev
