I think it would be clearer to do this, rather than 4 parallel checks: if (intel->gen >= 7) { /* rationale ... */ x0 = ROUND_DOWN_TO(x0, 2 * x_align); y0 = ROUND_DOWN_TO(y0, 2 * y_align); x1 = ALIGN(x1, 2 * x_align); y1 = ALIGN(y1, 2 * y_align); } else { x0 = ROUND_DOWN_TO(x0, x_align); y0 = ROUND_DOWN_TO(y0, y_align); x1 = ALIGN(x1, x_align); y1 = ALIGN(y1, y_align); }
Could you adjust the comment to include the rationale for this being done on all Gen7+? As it is, someone is going to stumble across this as a HSW GT3 workaround, see > Gen6, and going to have to hunting in the git history to convince themselves it's not bogus. This patch will also need to be fixed up for Ken's intel_context -> brw_context change, which has landed now. -- Chris _______________________________________________ mesa-dev mailing list mesa-dev@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/mesa-dev