From: Marek Olšák <marek.ol...@amd.com>
---
src/gallium/drivers/radeonsi/si_cp_dma.c | 15 +++++++--------
1 file changed, 7 insertions(+), 8 deletions(-)
diff --git a/src/gallium/drivers/radeonsi/si_cp_dma.c
b/src/gallium/drivers/radeonsi/si_cp_dma.c
index 5e8d752d4e5..68090412088 100644
--- a/src/gallium/drivers/radeonsi/si_cp_dma.c
+++ b/src/gallium/drivers/radeonsi/si_cp_dma.c
@@ -413,22 +413,23 @@ static void si_cp_dma_realign_engine(struct si_context
*sctx, unsigned size,
* \param user_flags bitmask of SI_CPDMA_*
*/
void si_copy_buffer(struct si_context *sctx,
struct pipe_resource *dst, struct pipe_resource *src,
uint64_t dst_offset, uint64_t src_offset, unsigned size,
unsigned user_flags)
{
uint64_t main_dst_offset, main_src_offset;
unsigned skipped_size = 0;
unsigned realign_size = 0;
- unsigned tc_l2_flag = get_tc_l2_flag(sctx, SI_COHERENCY_SHADER);
- unsigned flush_flags = get_flush_flags(sctx, SI_COHERENCY_SHADER);
+ enum si_coherency coher = SI_COHERENCY_SHADER;
+ unsigned tc_l2_flag = get_tc_l2_flag(sctx, coher);
+ unsigned flush_flags = get_flush_flags(sctx, coher);
bool is_first = true;
if (!size)
return;
if (dst != src || dst_offset != src_offset) {
/* Mark the buffer range of destination as valid (initialized),
* so that transfer_map knows it should wait for the GPU when
mapping
* that range. */
util_range_add(&r600_resource(dst)->valid_buffer_range,
dst_offset,
@@ -468,48 +469,46 @@ void si_copy_buffer(struct si_context *sctx,
/* This is the main part doing the copying. Src is always aligned. */
main_dst_offset = dst_offset + skipped_size;
main_src_offset = src_offset + skipped_size;
while (size) {
unsigned dma_flags = tc_l2_flag;
unsigned byte_count = MIN2(size, cp_dma_max_byte_count(sctx));
si_cp_dma_prepare(sctx, dst, src, byte_count,
size + skipped_size + realign_size,
- user_flags, SI_COHERENCY_SHADER, &is_first,
- &dma_flags);
+ user_flags, coher, &is_first, &dma_flags);
si_emit_cp_dma(sctx, main_dst_offset, main_src_offset,
byte_count, dma_flags);
size -= byte_count;
main_src_offset += byte_count;
main_dst_offset += byte_count;
}
/* Copy the part we skipped because src wasn't aligned. */
if (skipped_size) {
unsigned dma_flags = tc_l2_flag;
si_cp_dma_prepare(sctx, dst, src, skipped_size,
skipped_size + realign_size, user_flags,
- SI_COHERENCY_SHADER,
- &is_first, &dma_flags);
+ coher, &is_first, &dma_flags);
si_emit_cp_dma(sctx, dst_offset, src_offset, skipped_size,
dma_flags);
}
/* Finally, realign the engine if the size wasn't aligned. */
if (realign_size) {
- si_cp_dma_realign_engine(sctx, realign_size, user_flags,
- SI_COHERENCY_SHADER, &is_first);
+ si_cp_dma_realign_engine(sctx, realign_size, user_flags, coher,
+ &is_first);
}
if (tc_l2_flag)
r600_resource(dst)->TC_L2_dirty = true;
/* If it's not a prefetch... */
if (dst_offset != src_offset)
sctx->num_cp_dma_calls++;
}
--
2.17.1
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