From: Marek Olšák <marek.ol...@amd.com>
---
src/gallium/drivers/radeonsi/si_shader.c | 73 ++++++----------
.../drivers/radeonsi/si_shader_tgsi_alu.c | 85 ++++++-------------
2 files changed, 55 insertions(+), 103 deletions(-)
diff --git a/src/gallium/drivers/radeonsi/si_shader.c
b/src/gallium/drivers/radeonsi/si_shader.c
index 30e150eb6c0..3582e5366de 100644
--- a/src/gallium/drivers/radeonsi/si_shader.c
+++ b/src/gallium/drivers/radeonsi/si_shader.c
@@ -3995,26 +3995,38 @@ static LLVMValueRef si_llvm_emit_ddxy_interp(
LLVMConstInt(ctx->i32, i, 0), "");
result[i] = ac_build_ddxy(&ctx->ac, AC_TID_MASK_TOP_LEFT, 1,
ac_to_integer(&ctx->ac, a)); /* DDX */
result[2+i] = ac_build_ddxy(&ctx->ac, AC_TID_MASK_TOP_LEFT, 2,
ac_to_integer(&ctx->ac, a)); /* DDY
*/
}
return ac_build_gather_values(&ctx->ac, result, 4);
}
-static void interp_fetch_args(
- struct lp_build_tgsi_context *bld_base,
- struct lp_build_emit_data *emit_data)
+static void build_interp_intrinsic(const struct lp_build_tgsi_action *action,
+ struct lp_build_tgsi_context *bld_base,
+ struct lp_build_emit_data *emit_data)
{
struct si_shader_context *ctx = si_shader_context(bld_base);
+ struct si_shader *shader = ctx->shader;
+ const struct tgsi_shader_info *info = &shader->selector->info;
+ LLVMValueRef interp_param;
const struct tgsi_full_instruction *inst = emit_data->inst;
+ const struct tgsi_full_src_register *input = &inst->Src[0];
+ int input_base, input_array_size;
+ int chan;
+ int i;
+ LLVMValueRef prim_mask = ctx->abi.prim_mask;
+ LLVMValueRef array_idx;
+ int interp_param_idx;
+ unsigned interp;
+ unsigned location;
if (inst->Instruction.Opcode == TGSI_OPCODE_INTERP_OFFSET) {
/* offset is in second src, first two channels */
emit_data->args[0] = lp_build_emit_fetch(bld_base,
emit_data->inst, 1,
TGSI_CHAN_X);
emit_data->args[1] = lp_build_emit_fetch(bld_base,
emit_data->inst, 1,
TGSI_CHAN_Y);
emit_data->arg_count = 2;
@@ -4061,40 +4073,20 @@ static void interp_fetch_args(
sample_position,
ctx->i32_0, "");
emit_data->args[0] = LLVMBuildFSub(ctx->ac.builder,
emit_data->args[0], halfval, "");
emit_data->args[1] = LLVMBuildExtractElement(ctx->ac.builder,
sample_position,
ctx->i32_1, "");
emit_data->args[1] = LLVMBuildFSub(ctx->ac.builder,
emit_data->args[1], halfval, "");
emit_data->arg_count = 2;
}
-}
-
-static void build_interp_intrinsic(const struct lp_build_tgsi_action *action,
- struct lp_build_tgsi_context *bld_base,
- struct lp_build_emit_data *emit_data)
-{
- struct si_shader_context *ctx = si_shader_context(bld_base);
- struct si_shader *shader = ctx->shader;
- const struct tgsi_shader_info *info = &shader->selector->info;
- LLVMValueRef interp_param;
- const struct tgsi_full_instruction *inst = emit_data->inst;
- const struct tgsi_full_src_register *input = &inst->Src[0];
- int input_base, input_array_size;
- int chan;
- int i;
- LLVMValueRef prim_mask = ctx->abi.prim_mask;
- LLVMValueRef array_idx;
- int interp_param_idx;
- unsigned interp;
- unsigned location;
assert(input->Register.File == TGSI_FILE_INPUT);
if (input->Register.Indirect) {
unsigned array_id = input->Indirect.ArrayID;
if (array_id) {
input_base = info->input_array_first[array_id];
input_array_size = info->input_array_last[array_id] -
input_base + 1;
} else {
@@ -4237,40 +4229,37 @@ static void ballot_emit(
LLVMValueRef tmp;
tmp = lp_build_emit_fetch(bld_base, emit_data->inst, 0, TGSI_CHAN_X);
tmp = ac_build_ballot(&ctx->ac, tmp);
tmp = LLVMBuildBitCast(builder, tmp, ctx->v2i32, "");
emit_data->output[0] = LLVMBuildExtractElement(builder, tmp,
ctx->i32_0, "");
emit_data->output[1] = LLVMBuildExtractElement(builder, tmp,
ctx->i32_1, "");
}
-static void read_invoc_fetch_args(
- struct lp_build_tgsi_context *bld_base,
- struct lp_build_emit_data *emit_data)
-{
- emit_data->args[0] = lp_build_emit_fetch(bld_base, emit_data->inst,
- 0, emit_data->src_chan);
-
- /* Always read the source invocation (= lane) from the X channel. */
- emit_data->args[1] = lp_build_emit_fetch(bld_base, emit_data->inst,
- 1, TGSI_CHAN_X);
- emit_data->arg_count = 2;
-}
-
static void read_lane_emit(
const struct lp_build_tgsi_action *action,
struct lp_build_tgsi_context *bld_base,
struct lp_build_emit_data *emit_data)
{
struct si_shader_context *ctx = si_shader_context(bld_base);
+ if (emit_data->inst->Instruction.Opcode == TGSI_OPCODE_READ_INVOC) {
+ emit_data->args[0] = lp_build_emit_fetch(bld_base,
emit_data->inst,
+ 0,
emit_data->src_chan);
+
+ /* Always read the source invocation (= lane) from the X
channel. */
+ emit_data->args[1] = lp_build_emit_fetch(bld_base,
emit_data->inst,
+ 1, TGSI_CHAN_X);
+ emit_data->arg_count = 2;
+ }
+
/* We currently have no other way to prevent LLVM from lifting the icmp
* calls to a dominating basic block.
*/
ac_build_optimization_barrier(&ctx->ac, &emit_data->args[0]);
for (unsigned i = 0; i < emit_data->arg_count; ++i)
emit_data->args[i] = ac_to_integer(&ctx->ac,
emit_data->args[i]);
emit_data->output[emit_data->chan] =
ac_build_intrinsic(&ctx->ac, action->intr_name,
@@ -4419,25 +4408,20 @@ static void si_llvm_emit_barrier(const struct
lp_build_tgsi_action *action,
ctx->type == PIPE_SHADER_TESS_CTRL) {
ac_build_waitcnt(&ctx->ac, LGKM_CNT & VM_CNT);
return;
}
ac_build_intrinsic(&ctx->ac,
"llvm.amdgcn.s.barrier",
ctx->voidt, NULL, 0, AC_FUNC_ATTR_CONVERGENT);
}
-static const struct lp_build_tgsi_action interp_action = {
- .fetch_args = interp_fetch_args,
- .emit = build_interp_intrinsic,
-};
-
static void si_create_function(struct si_shader_context *ctx,
const char *name,
LLVMTypeRef *returns, unsigned num_returns,
struct si_function_info *fninfo,
unsigned max_workgroup_size)
{
int i;
si_llvm_create_func(ctx, name, returns, num_returns,
fninfo->types, fninfo->num_params);
@@ -5982,41 +5966,40 @@ static void si_init_shader_ctx(struct si_shader_context
*ctx,
struct si_screen *sscreen,
struct ac_llvm_compiler *compiler)
{
struct lp_build_tgsi_context *bld_base;
si_llvm_context_init(ctx, sscreen, compiler);
bld_base = &ctx->bld_base;
bld_base->emit_fetch_funcs[TGSI_FILE_CONSTANT] = fetch_constant;
- bld_base->op_actions[TGSI_OPCODE_INTERP_CENTROID] = interp_action;
- bld_base->op_actions[TGSI_OPCODE_INTERP_SAMPLE] = interp_action;
- bld_base->op_actions[TGSI_OPCODE_INTERP_OFFSET] = interp_action;
+ bld_base->op_actions[TGSI_OPCODE_INTERP_CENTROID].emit =
build_interp_intrinsic;
+ bld_base->op_actions[TGSI_OPCODE_INTERP_SAMPLE].emit =
build_interp_intrinsic;
+ bld_base->op_actions[TGSI_OPCODE_INTERP_OFFSET].emit =
build_interp_intrinsic;
bld_base->op_actions[TGSI_OPCODE_MEMBAR].emit = membar_emit;
bld_base->op_actions[TGSI_OPCODE_CLOCK].emit = clock_emit;
bld_base->op_actions[TGSI_OPCODE_DDX].emit = si_llvm_emit_ddxy;
bld_base->op_actions[TGSI_OPCODE_DDY].emit = si_llvm_emit_ddxy;
bld_base->op_actions[TGSI_OPCODE_DDX_FINE].emit = si_llvm_emit_ddxy;
bld_base->op_actions[TGSI_OPCODE_DDY_FINE].emit = si_llvm_emit_ddxy;
bld_base->op_actions[TGSI_OPCODE_VOTE_ALL].emit = vote_all_emit;
bld_base->op_actions[TGSI_OPCODE_VOTE_ANY].emit = vote_any_emit;
bld_base->op_actions[TGSI_OPCODE_VOTE_EQ].emit = vote_eq_emit;
bld_base->op_actions[TGSI_OPCODE_BALLOT].emit = ballot_emit;
bld_base->op_actions[TGSI_OPCODE_READ_FIRST].intr_name =
"llvm.amdgcn.readfirstlane";
bld_base->op_actions[TGSI_OPCODE_READ_FIRST].emit = read_lane_emit;
bld_base->op_actions[TGSI_OPCODE_READ_INVOC].intr_name =
"llvm.amdgcn.readlane";
- bld_base->op_actions[TGSI_OPCODE_READ_INVOC].fetch_args =
read_invoc_fetch_args;
bld_base->op_actions[TGSI_OPCODE_READ_INVOC].emit = read_lane_emit;
bld_base->op_actions[TGSI_OPCODE_EMIT].emit = si_tgsi_emit_vertex;
bld_base->op_actions[TGSI_OPCODE_ENDPRIM].emit = si_tgsi_emit_primitive;
bld_base->op_actions[TGSI_OPCODE_BARRIER].emit = si_llvm_emit_barrier;
}
static void si_optimize_vs_outputs(struct si_shader_context *ctx)
{
struct si_shader *shader = ctx->shader;
diff --git a/src/gallium/drivers/radeonsi/si_shader_tgsi_alu.c
b/src/gallium/drivers/radeonsi/si_shader_tgsi_alu.c
index 4c908745313..028ca8b0dd6 100644
--- a/src/gallium/drivers/radeonsi/si_shader_tgsi_alu.c
+++ b/src/gallium/drivers/radeonsi/si_shader_tgsi_alu.c
@@ -18,45 +18,20 @@
* FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
* THE AUTHOR(S) AND/OR THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM,
* DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
* OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
* USE OR OTHER DEALINGS IN THE SOFTWARE.
*/
#include "si_shader_internal.h"
#include "ac_llvm_util.h"
-static void kill_if_fetch_args(struct lp_build_tgsi_context *bld_base,
- struct lp_build_emit_data *emit_data)
-{
- const struct tgsi_full_instruction *inst = emit_data->inst;
- struct si_shader_context *ctx = si_shader_context(bld_base);
- LLVMBuilderRef builder = ctx->ac.builder;
- unsigned i;
- LLVMValueRef conds[TGSI_NUM_CHANNELS];
-
- for (i = 0; i < TGSI_NUM_CHANNELS; i++) {
- LLVMValueRef value = lp_build_emit_fetch(bld_base, inst, 0, i);
- conds[i] = LLVMBuildFCmp(builder, LLVMRealOGE, value,
- ctx->ac.f32_0, "");
- }
-
- /* And the conditions together */
- for (i = TGSI_NUM_CHANNELS - 1; i > 0; i--) {
- conds[i - 1] = LLVMBuildAnd(builder, conds[i], conds[i - 1],
"");
- }
-
- emit_data->dst_type = ctx->voidt;
- emit_data->arg_count = 1;
- emit_data->args[0] = conds[0];
-}
-
void si_llvm_emit_kill(struct ac_shader_abi *abi, LLVMValueRef visible)
{
struct si_shader_context *ctx = si_shader_context_from_abi(abi);
LLVMBuilderRef builder = ctx->ac.builder;
if (ctx->shader->selector->force_correct_derivs_after_kill) {
/* Kill immediately while maintaining WQM. */
ac_build_kill_if_false(&ctx->ac,
ac_build_wqm_vote(&ctx->ac, visible));
@@ -70,21 +45,37 @@ void si_llvm_emit_kill(struct ac_shader_abi *abi,
LLVMValueRef visible)
}
static void kil_emit(const struct lp_build_tgsi_action *action,
struct lp_build_tgsi_context *bld_base,
struct lp_build_emit_data *emit_data)
{
struct si_shader_context *ctx = si_shader_context(bld_base);
LLVMValueRef visible;
if (emit_data->inst->Instruction.Opcode == TGSI_OPCODE_KILL_IF) {
- visible = emit_data->args[0];
+ const struct tgsi_full_instruction *inst = emit_data->inst;
+ struct si_shader_context *ctx = si_shader_context(bld_base);
+ LLVMBuilderRef builder = ctx->ac.builder;
+ unsigned i;
+ LLVMValueRef conds[TGSI_NUM_CHANNELS];
+
+ for (i = 0; i < TGSI_NUM_CHANNELS; i++) {
+ LLVMValueRef value = lp_build_emit_fetch(bld_base,
inst, 0, i);
+ conds[i] = LLVMBuildFCmp(builder, LLVMRealOGE, value,
+ ctx->ac.f32_0, "");
+ }
+
+ /* And the conditions together */
+ for (i = TGSI_NUM_CHANNELS - 1; i > 0; i--) {
+ conds[i - 1] = LLVMBuildAnd(builder, conds[i], conds[i
- 1], "");
+ }
+ visible = conds[0];
} else {
assert(emit_data->inst->Instruction.Opcode == TGSI_OPCODE_KILL);
visible = LLVMConstInt(ctx->i1, false, 0);
}
si_llvm_emit_kill(&ctx->abi, visible);
}
static void emit_icmp(const struct lp_build_tgsi_action *action,
struct lp_build_tgsi_context *bld_base,
@@ -589,65 +580,53 @@ static void emit_minmax_int(const struct
lp_build_tgsi_action *action,
}
emit_data->output[emit_data->chan] =
LLVMBuildSelect(ctx->ac.builder,
LLVMBuildICmp(ctx->ac.builder, op,
emit_data->args[0],
emit_data->args[1], ""),
emit_data->args[0],
emit_data->args[1], "");
}
-static void pk2h_fetch_args(struct lp_build_tgsi_context *bld_base,
- struct lp_build_emit_data *emit_data)
-{
- emit_data->args[0] = lp_build_emit_fetch(bld_base, emit_data->inst,
- 0, TGSI_CHAN_X);
- emit_data->args[1] = lp_build_emit_fetch(bld_base, emit_data->inst,
- 0, TGSI_CHAN_Y);
-}
-
static void emit_pk2h(const struct lp_build_tgsi_action *action,
struct lp_build_tgsi_context *bld_base,
struct lp_build_emit_data *emit_data)
{
struct si_shader_context *ctx = si_shader_context(bld_base);
+ LLVMValueRef v[] = {
+ lp_build_emit_fetch(bld_base, emit_data->inst, 0, TGSI_CHAN_X),
+ lp_build_emit_fetch(bld_base, emit_data->inst, 0, TGSI_CHAN_Y),
+ };
+
/* From the GLSL 4.50 spec:
* "The rounding mode cannot be set and is undefined."
*
* v_cvt_pkrtz_f16 rounds to zero, but it's fastest.
*/
emit_data->output[emit_data->chan] =
- LLVMBuildBitCast(ctx->ac.builder,
- ac_build_cvt_pkrtz_f16(&ctx->ac,
emit_data->args),
+ LLVMBuildBitCast(ctx->ac.builder,
ac_build_cvt_pkrtz_f16(&ctx->ac, v),
ctx->i32, "");
}
-static void up2h_fetch_args(struct lp_build_tgsi_context *bld_base,
- struct lp_build_emit_data *emit_data)
-{
- emit_data->args[0] = lp_build_emit_fetch(bld_base, emit_data->inst,
- 0, TGSI_CHAN_X);
-}
-
static void emit_up2h(const struct lp_build_tgsi_action *action,
struct lp_build_tgsi_context *bld_base,
struct lp_build_emit_data *emit_data)
{
struct si_shader_context *ctx = si_shader_context(bld_base);
LLVMTypeRef i16;
LLVMValueRef const16, input, val;
unsigned i;
i16 = LLVMInt16TypeInContext(ctx->ac.context);
const16 = LLVMConstInt(ctx->i32, 16, 0);
- input = emit_data->args[0];
+ input = lp_build_emit_fetch(bld_base, emit_data->inst, 0, TGSI_CHAN_X);
for (i = 0; i < 2; i++) {
val = i == 1 ? LLVMBuildLShr(ctx->ac.builder, input, const16,
"") : input;
val = LLVMBuildTrunc(ctx->ac.builder, val, i16, "");
val = ac_to_float(&ctx->ac, val);
emit_data->output[i] = LLVMBuildFPExt(ctx->ac.builder, val,
ctx->f32, "");
}
}
static void emit_fdiv(const struct lp_build_tgsi_action *action,
@@ -669,39 +648,33 @@ static void emit_rsq(const struct lp_build_tgsi_action
*action,
struct si_shader_context *ctx = si_shader_context(bld_base);
LLVMValueRef sqrt =
ac_build_intrinsic(&ctx->ac, "llvm.sqrt.f32", ctx->f32,
&emit_data->args[0], 1,
AC_FUNC_ATTR_READNONE);
emit_data->output[emit_data->chan] =
ac_build_fdiv(&ctx->ac, ctx->ac.f32_1, sqrt);
}
-static void dfracexp_fetch_args(struct lp_build_tgsi_context *bld_base,
- struct lp_build_emit_data *emit_data)
-{
- emit_data->args[0] = lp_build_emit_fetch(bld_base, emit_data->inst, 0,
TGSI_CHAN_X);
- emit_data->arg_count = 1;
-}
-
static void dfracexp_emit(const struct lp_build_tgsi_action *action,
struct lp_build_tgsi_context *bld_base,
struct lp_build_emit_data *emit_data)
{
struct si_shader_context *ctx = si_shader_context(bld_base);
+ LLVMValueRef in = lp_build_emit_fetch(bld_base, emit_data->inst, 0,
TGSI_CHAN_X);
emit_data->output[emit_data->chan] =
ac_build_intrinsic(&ctx->ac, "llvm.amdgcn.frexp.mant.f64",
- ctx->ac.f64, &emit_data->args[0], 1, 0);
+ ctx->ac.f64, &in, 1, 0);
emit_data->output1[emit_data->chan] =
ac_build_intrinsic(&ctx->ac, "llvm.amdgcn.frexp.exp.i32.f64",
- ctx->ac.i32, &emit_data->args[0], 1, 0);
+ ctx->ac.i32, &in, 1, 0);
}
void si_shader_context_init_alu(struct lp_build_tgsi_context *bld_base)
{
lp_set_default_actions(bld_base);
bld_base->op_actions[TGSI_OPCODE_AND].emit = emit_and;
bld_base->op_actions[TGSI_OPCODE_ARL].emit = emit_arl;
bld_base->op_actions[TGSI_OPCODE_BFI].emit = emit_bfi;
bld_base->op_actions[TGSI_OPCODE_BREV].emit =
build_tgsi_intrinsic_nomem;
@@ -728,21 +701,20 @@ void si_shader_context_init_alu(struct
lp_build_tgsi_context *bld_base)
bld_base->op_actions[TGSI_OPCODE_DSGE].emit = emit_dcmp;
bld_base->op_actions[TGSI_OPCODE_DSLT].emit = emit_dcmp;
bld_base->op_actions[TGSI_OPCODE_DSNE].emit = emit_dcmp;
bld_base->op_actions[TGSI_OPCODE_DSSG].emit = emit_ssg;
bld_base->op_actions[TGSI_OPCODE_DRSQ].emit =
build_tgsi_intrinsic_nomem;
bld_base->op_actions[TGSI_OPCODE_DRSQ].intr_name =
"llvm.amdgcn.rsq.f64";
bld_base->op_actions[TGSI_OPCODE_DSQRT].emit =
build_tgsi_intrinsic_nomem;
bld_base->op_actions[TGSI_OPCODE_DSQRT].intr_name = "llvm.sqrt.f64";
bld_base->op_actions[TGSI_OPCODE_DTRUNC].emit =
build_tgsi_intrinsic_nomem;
bld_base->op_actions[TGSI_OPCODE_DTRUNC].intr_name = "llvm.trunc.f64";
- bld_base->op_actions[TGSI_OPCODE_DFRACEXP].fetch_args =
dfracexp_fetch_args;
bld_base->op_actions[TGSI_OPCODE_DFRACEXP].emit = dfracexp_emit;
bld_base->op_actions[TGSI_OPCODE_DLDEXP].emit =
build_tgsi_intrinsic_nomem;
bld_base->op_actions[TGSI_OPCODE_DLDEXP].intr_name =
"llvm.amdgcn.ldexp.f64";
bld_base->op_actions[TGSI_OPCODE_EX2].emit = build_tgsi_intrinsic_nomem;
bld_base->op_actions[TGSI_OPCODE_EX2].intr_name = "llvm.exp2.f32";
bld_base->op_actions[TGSI_OPCODE_FLR].emit = build_tgsi_intrinsic_nomem;
bld_base->op_actions[TGSI_OPCODE_FLR].intr_name = "llvm.floor.f32";
bld_base->op_actions[TGSI_OPCODE_FMA].emit =
bld_base->op_actions[TGSI_OPCODE_MAD].emit;
bld_base->op_actions[TGSI_OPCODE_FRC].emit = emit_frac;
@@ -757,37 +729,35 @@ void si_shader_context_init_alu(struct
lp_build_tgsi_context *bld_base)
bld_base->op_actions[TGSI_OPCODE_IDIV].emit = emit_idiv;
bld_base->op_actions[TGSI_OPCODE_IMAX].emit = emit_minmax_int;
bld_base->op_actions[TGSI_OPCODE_IMIN].emit = emit_minmax_int;
bld_base->op_actions[TGSI_OPCODE_IMSB].emit = emit_imsb;
bld_base->op_actions[TGSI_OPCODE_INEG].emit = emit_ineg;
bld_base->op_actions[TGSI_OPCODE_ISHR].emit = emit_ishr;
bld_base->op_actions[TGSI_OPCODE_ISGE].emit = emit_icmp;
bld_base->op_actions[TGSI_OPCODE_ISLT].emit = emit_icmp;
bld_base->op_actions[TGSI_OPCODE_ISSG].emit = emit_ssg;
bld_base->op_actions[TGSI_OPCODE_I2F].emit = emit_i2f;
- bld_base->op_actions[TGSI_OPCODE_KILL_IF].fetch_args =
kill_if_fetch_args;
bld_base->op_actions[TGSI_OPCODE_KILL_IF].emit = kil_emit;
bld_base->op_actions[TGSI_OPCODE_KILL].emit = kil_emit;
bld_base->op_actions[TGSI_OPCODE_LDEXP].emit =
build_tgsi_intrinsic_nomem;
bld_base->op_actions[TGSI_OPCODE_LDEXP].intr_name =
"llvm.amdgcn.ldexp.f32";
bld_base->op_actions[TGSI_OPCODE_LSB].emit = emit_lsb;
bld_base->op_actions[TGSI_OPCODE_LG2].emit = build_tgsi_intrinsic_nomem;
bld_base->op_actions[TGSI_OPCODE_LG2].intr_name = "llvm.log2.f32";
bld_base->op_actions[TGSI_OPCODE_MAX].emit = build_tgsi_intrinsic_nomem;
bld_base->op_actions[TGSI_OPCODE_MAX].intr_name = "llvm.maxnum.f32";
bld_base->op_actions[TGSI_OPCODE_MIN].emit = build_tgsi_intrinsic_nomem;
bld_base->op_actions[TGSI_OPCODE_MIN].intr_name = "llvm.minnum.f32";
bld_base->op_actions[TGSI_OPCODE_MOD].emit = emit_mod;
bld_base->op_actions[TGSI_OPCODE_UMSB].emit = emit_umsb;
bld_base->op_actions[TGSI_OPCODE_NOT].emit = emit_not;
bld_base->op_actions[TGSI_OPCODE_OR].emit = emit_or;
- bld_base->op_actions[TGSI_OPCODE_PK2H].fetch_args = pk2h_fetch_args;
bld_base->op_actions[TGSI_OPCODE_PK2H].emit = emit_pk2h;
bld_base->op_actions[TGSI_OPCODE_POPC].emit =
build_tgsi_intrinsic_nomem;
bld_base->op_actions[TGSI_OPCODE_POPC].intr_name = "llvm.ctpop.i32";
bld_base->op_actions[TGSI_OPCODE_POW].emit = build_tgsi_intrinsic_nomem;
bld_base->op_actions[TGSI_OPCODE_POW].intr_name = "llvm.pow.f32";
bld_base->op_actions[TGSI_OPCODE_ROUND].emit =
build_tgsi_intrinsic_nomem;
bld_base->op_actions[TGSI_OPCODE_ROUND].intr_name = "llvm.rint.f32";
bld_base->op_actions[TGSI_OPCODE_RSQ].emit = emit_rsq;
bld_base->op_actions[TGSI_OPCODE_SGE].emit = emit_set_cond;
bld_base->op_actions[TGSI_OPCODE_SEQ].emit = emit_set_cond;
@@ -810,21 +780,20 @@ void si_shader_context_init_alu(struct
lp_build_tgsi_context *bld_base)
bld_base->op_actions[TGSI_OPCODE_UMIN].emit = emit_minmax_int;
bld_base->op_actions[TGSI_OPCODE_UMOD].emit = emit_umod;
bld_base->op_actions[TGSI_OPCODE_USEQ].emit = emit_icmp;
bld_base->op_actions[TGSI_OPCODE_USGE].emit = emit_icmp;
bld_base->op_actions[TGSI_OPCODE_USHR].emit = emit_ushr;
bld_base->op_actions[TGSI_OPCODE_USLT].emit = emit_icmp;
bld_base->op_actions[TGSI_OPCODE_USNE].emit = emit_icmp;
bld_base->op_actions[TGSI_OPCODE_U2F].emit = emit_u2f;
bld_base->op_actions[TGSI_OPCODE_XOR].emit = emit_xor;
bld_base->op_actions[TGSI_OPCODE_UCMP].emit = emit_ucmp;
- bld_base->op_actions[TGSI_OPCODE_UP2H].fetch_args = up2h_fetch_args;
bld_base->op_actions[TGSI_OPCODE_UP2H].emit = emit_up2h;
bld_base->op_actions[TGSI_OPCODE_I64MAX].emit = emit_minmax_int;
bld_base->op_actions[TGSI_OPCODE_I64MIN].emit = emit_minmax_int;
bld_base->op_actions[TGSI_OPCODE_U64MAX].emit = emit_minmax_int;
bld_base->op_actions[TGSI_OPCODE_U64MIN].emit = emit_minmax_int;
bld_base->op_actions[TGSI_OPCODE_I64ABS].emit = emit_iabs;
bld_base->op_actions[TGSI_OPCODE_I64SSG].emit = emit_ssg;
bld_base->op_actions[TGSI_OPCODE_I64NEG].emit = emit_ineg;
--
2.17.1
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