From: Elie Tournier <tournier.e...@gmail.com>
v2: use mix.
Signed-off-by: Elie Tournier <elie.tourn...@collabora.com>
---
src/compiler/glsl/builtin_float64.h | 51 +++++++++++++++++++++++++++++++++
src/compiler/glsl/builtin_functions.cpp | 4 +++
src/compiler/glsl/builtin_functions.h | 3 ++
src/compiler/glsl/float64.glsl | 24 ++++++++++++++++
src/compiler/glsl/glcpp/glcpp-parse.y | 1 +
5 files changed, 83 insertions(+)
diff --git a/src/compiler/glsl/builtin_float64.h
b/src/compiler/glsl/builtin_float64.h
index 7b57231..2898fc9 100644
--- a/src/compiler/glsl/builtin_float64.h
+++ b/src/compiler/glsl/builtin_float64.h
@@ -17,3 +17,54 @@ fabs64(void *mem_ctx, builtin_available_predicate avail)
sig->replace_parameters(&sig_parameters);
return sig;
}
+ir_function_signature *
+is_nan(void *mem_ctx, builtin_available_predicate avail)
+{
+ ir_function_signature *const sig =
+ new(mem_ctx) ir_function_signature(glsl_type::bool_type, avail);
+ ir_factory body(&sig->body, mem_ctx);
+ sig->is_defined = true;
+
+ exec_list sig_parameters;
+
+ ir_variable *const r000C = new(mem_ctx) ir_variable(glsl_type::uvec2_type,
"a", ir_var_function_in);
+ sig_parameters.push_tail(r000C);
+ ir_expression *const r000D = lshift(swizzle_y(r000C),
body.constant(int(1)));
+ ir_expression *const r000E = gequal(r000D, body.constant(4292870144u));
+ ir_expression *const r000F = nequal(swizzle_x(r000C), body.constant(0u));
+ ir_expression *const r0010 = bit_and(swizzle_y(r000C),
body.constant(1048575u));
+ ir_expression *const r0011 = nequal(r0010, body.constant(0u));
+ ir_expression *const r0012 = logic_or(r000F, r0011);
+ ir_expression *const r0013 = logic_and(r000E, r0012);
+ body.emit(ret(r0013));
+
+ sig->replace_parameters(&sig_parameters);
+ return sig;
+}
+ir_function_signature *
+fneg64(void *mem_ctx, builtin_available_predicate avail)
+{
+ ir_function_signature *const sig =
+ new(mem_ctx) ir_function_signature(glsl_type::uvec2_type, avail);
+ ir_factory body(&sig->body, mem_ctx);
+ sig->is_defined = true;
+
+ exec_list sig_parameters;
+
+ ir_variable *const r0014 = new(mem_ctx) ir_variable(glsl_type::uvec2_type,
"a", ir_var_function_in);
+ sig_parameters.push_tail(r0014);
+ ir_expression *const r0015 = lshift(swizzle_y(r0014),
body.constant(int(1)));
+ ir_expression *const r0016 = gequal(r0015, body.constant(4292870144u));
+ ir_expression *const r0017 = nequal(swizzle_x(r0014), body.constant(0u));
+ ir_expression *const r0018 = bit_and(swizzle_y(r0014),
body.constant(1048575u));
+ ir_expression *const r0019 = nequal(r0018, body.constant(0u));
+ ir_expression *const r001A = logic_or(r0017, r0019);
+ ir_expression *const r001B = logic_and(r0016, r001A);
+ ir_expression *const r001C = bit_xor(swizzle_y(r0014),
body.constant(2147483648u));
+ body.emit(assign(r0014, expr(ir_triop_csel, r001B, swizzle_y(r0014),
r001C), 0x02));
+
+ body.emit(ret(r0014));
+
+ sig->replace_parameters(&sig_parameters);
+ return sig;
+}
diff --git a/src/compiler/glsl/builtin_functions.cpp
b/src/compiler/glsl/builtin_functions.cpp
index 133a896..9d88a31 100644
--- a/src/compiler/glsl/builtin_functions.cpp
+++ b/src/compiler/glsl/builtin_functions.cpp
@@ -3346,6 +3346,10 @@ builtin_builder::create_builtins()
generate_ir::fabs64(mem_ctx, integer_functions_supported),
NULL);
+ add_function("__builtin_fneg64",
+ generate_ir::fneg64(mem_ctx, integer_functions_supported),
+ NULL);
+
#undef F
#undef FI
#undef FIUD_VEC
diff --git a/src/compiler/glsl/builtin_functions.h
b/src/compiler/glsl/builtin_functions.h
index deaf640..adec424 100644
--- a/src/compiler/glsl/builtin_functions.h
+++ b/src/compiler/glsl/builtin_functions.h
@@ -70,6 +70,9 @@ udivmod64(void *mem_ctx, builtin_available_predicate avail);
ir_function_signature *
fabs64(void *mem_ctx, builtin_available_predicate avail);
+ir_function_signature *
+fneg64(void *mem_ctx, builtin_available_predicate avail);
+
}
#endif /* BULITIN_FUNCTIONS_H */
diff --git a/src/compiler/glsl/float64.glsl b/src/compiler/glsl/float64.glsl
index d798d7e..fedf8b7 100644
--- a/src/compiler/glsl/float64.glsl
+++ b/src/compiler/glsl/float64.glsl
@@ -6,6 +6,7 @@
#version 130
#extension GL_ARB_shader_bit_encoding : enable
+#extension GL_EXT_shader_integer_mix : enable
/* Software IEEE floating-point rounding mode.
* GLSL spec section "4.7.1 Range and Precision":
@@ -27,3 +28,26 @@ fabs64(uvec2 a)
a.y &= 0x7FFFFFFFu;
return a;
}
+
+/* Returns 1 if the double-precision floating-point value `a' is a NaN;
+ * otherwise returns 0.
+ */
+bool
+is_nan(uvec2 a)
+{
+ return (0xFFE00000u <= (a.y<<1)) &&
+ ((a.x != 0u) || ((a.y & 0x000FFFFFu) != 0u));
+}
+
+/* Negate value of a Float64 :
+ * Toggle the sign bit
+ */
+uvec2
+fneg64(uvec2 a)
+{
+ uint t = a.y;
+
+ t ^= (1u << 31);
+ a.y = mix(t, a.y, is_nan(a));
+ return a;
+}
diff --git a/src/compiler/glsl/glcpp/glcpp-parse.y
b/src/compiler/glsl/glcpp/glcpp-parse.y
index 4e7affa..b9506d8 100644
--- a/src/compiler/glsl/glcpp/glcpp-parse.y
+++ b/src/compiler/glsl/glcpp/glcpp-parse.y
@@ -2369,6 +2369,7 @@ _glcpp_parser_handle_version_declaration(glcpp_parser_t
*parser, intmax_t versio
add_builtin_define(parser, "__have_builtin_builtin_idiv64", 1);
add_builtin_define(parser, "__have_builtin_builtin_imod64", 1);
add_builtin_define(parser, "__have_builtin_builtin_fabs64", 1);
+ add_builtin_define(parser, "__have_builtin_builtin_fneg64", 1);
}
}
--
2.9.5
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