It is already done in NIR.
Signed-off-by: Samuel Iglesias Gonsálvez <sigles...@igalia.com>
---
src/intel/compiler/brw_vec4_nir.cpp | 9 ---------
src/intel/compiler/brw_vec4_visitor.cpp | 12 ------------
2 files changed, 21 deletions(-)
diff --git a/src/intel/compiler/brw_vec4_nir.cpp
b/src/intel/compiler/brw_vec4_nir.cpp
index 9200ffa0ed7..0a1caa9fad8 100644
--- a/src/intel/compiler/brw_vec4_nir.cpp
+++ b/src/intel/compiler/brw_vec4_nir.cpp
@@ -2228,15 +2228,6 @@ vec4_visitor::nir_emit_texture(nir_tex_instr *instr)
}
}
- /* TXS and TXL require a LOD but not everything we implement using those
- * two opcodes provides one. Provide a default LOD of 0.
- */
- if ((instr->op == nir_texop_txs ||
- instr->op == nir_texop_txl) &&
- lod.file == BAD_FILE) {
- lod = brw_imm_ud(0u);
- }
-
if (instr->op == nir_texop_txf_ms ||
instr->op == nir_texop_samples_identical) {
assert(coord_type != NULL);
diff --git a/src/intel/compiler/brw_vec4_visitor.cpp
b/src/intel/compiler/brw_vec4_visitor.cpp
index 88e80aaa3af..52d1dfc8fdd 100644
--- a/src/intel/compiler/brw_vec4_visitor.cpp
+++ b/src/intel/compiler/brw_vec4_visitor.cpp
@@ -915,18 +915,6 @@ vec4_visitor::emit_texture(ir_texture_opcode op,
src_reg surface_reg,
src_reg sampler_reg)
{
- /* The sampler can only meaningfully compute LOD for fragment shader
- * messages. For all other stages, we change the opcode to TXL and hardcode
- * the LOD to 0.
- *
- * textureQueryLevels() is implemented in terms of TXS so we need to pass a
- * valid LOD argument.
- */
- if (op == ir_tex || op == ir_query_levels) {
- assert(lod.file == BAD_FILE);
- lod = brw_imm_f(0.0f);
- }
-
enum opcode opcode;
switch (op) {
case ir_tex: opcode = SHADER_OPCODE_TXL; break;
--
2.14.2
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