On Fri, Dec 02, 2011 at 11:25:55AM -0800, Eric Anholt wrote: > On Thu, 1 Dec 2011 18:26:50 +0800, Yuanhan Liu <yuanhan....@linux.intel.com> > wrote: > > > > Actually the first 5 patches are all prepare work for patch 6. > > > > I checked those patches will all intel oglc testcases, and found no > > regressions. > > What's better, it fixed something. > > > > > > Yuanhan Liu (6): > > i965: let all the brw_OPCODE functions return an instruction index > > instead > > I don't like the brw_insn_of() thing for the common case of "I just > emitted an instruction and I want to tweak one parameter."
Yeah, I somehow don't like it, either. I guess the old code doesn't consider the case that the p->store memory would change, thus it always reference the instruction by the pointer. Well, if p->store is dynamically changed, we should use the instruction index instead of pointer. Thus, I changed the prototype of brw_next_instruction() to let it return the instruction index. While making this change, I thought this is a little overdoing. And, yes, it turned out to be overdoing. > As far as I > can see, it should be possible to store the DO/WHILE/BRK/CONT > information in struct brw_compile so that the only long-lived > brw_instruction * pointers other than p->store go away. I may not get your idea. But I thought: since we are going to store the instruction index in the if_stack and loop_stack, it would be simple if we let brw_DO to return the instruction index. Thus I made several new patches yesterday(and already sent out). Please help to review it. Thanks, Yuanhan Liu _______________________________________________ mesa-dev mailing list mesa-dev@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/mesa-dev
