From: "Juan A. Suarez Romero" <jasua...@igalia.com> Double-precision types require 1 slot in VUE for double and dvec2, and 2 slots for anything else. --- src/mesa/drivers/dri/i965/brw_nir.c | 26 +++++++++++--------------- 1 file changed, 11 insertions(+), 15 deletions(-)
diff --git a/src/mesa/drivers/dri/i965/brw_nir.c b/src/mesa/drivers/dri/i965/brw_nir.c index 42cfbaa..1d14437 100644 --- a/src/mesa/drivers/dri/i965/brw_nir.c +++ b/src/mesa/drivers/dri/i965/brw_nir.c @@ -103,7 +103,7 @@ add_const_offset_to_base(nir_shader *nir, nir_variable_mode mode) static bool remap_vs_attrs(nir_block *block, void *closure) { - GLbitfield64 inputs_read = *((GLbitfield64 *) closure); + struct nir_shader_info *nir_info = (struct nir_shader_info *) closure; nir_foreach_instr(block, instr) { if (instr->type != nir_instr_type_intrinsic) @@ -118,9 +118,11 @@ remap_vs_attrs(nir_block *block, void *closure) * before it and counting the bits. */ int attr = intrin->const_index[0]; - int slot = _mesa_bitcount_64(inputs_read & BITFIELD64_MASK(attr)); - - intrin->const_index[0] = 4 * slot; + int slot = _mesa_bitcount_64(nir_info->inputs_read & + BITFIELD64_MASK(attr)); + int dslot = _mesa_bitcount_64(nir_info->double_inputs_read & + BITFIELD64_MASK(attr)); + intrin->const_index[0] = 4 * (slot + dslot); } } return true; @@ -214,9 +216,9 @@ brw_nir_lower_vs_inputs(nir_shader *nir, var->data.driver_location = var->data.location; } - /* Now use nir_lower_io to walk dereference chains. Attribute arrays - * are loaded as one vec4 per element (or matrix column), so we use - * type_size_vec4 here. + /* Now use nir_lower_io to walk dereference chains. Attribute arrays are + * loaded as one vec4 or dvec4 per element (or matrix column), depending on + * whether it is a double-precision type or not. */ nir_lower_io(nir, nir_var_shader_in, type_size_vec4); @@ -229,17 +231,11 @@ brw_nir_lower_vs_inputs(nir_shader *nir, vs_attrib_wa_flags); if (is_scalar) { - /* Finally, translate VERT_ATTRIB_* values into the actual registers. - * - * Note that we can use nir->info.inputs_read instead of - * key->inputs_read since the two are identical aside from Gen4-5 - * edge flag differences. - */ - GLbitfield64 inputs_read = nir->info.inputs_read; + /* Finally, translate VERT_ATTRIB_* values into the actual registers. */ nir_foreach_function(nir, function) { if (function->impl) { - nir_foreach_block_call(function->impl, remap_vs_attrs, &inputs_read); + nir_foreach_block_call(function->impl, remap_vs_attrs, &nir->info); } } } -- 2.5.0 _______________________________________________ mesa-dev mailing list mesa-dev@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/mesa-dev