In the 16-wide rework, I missed that we were setting some things to be
SIMD16 mode (corresponding to their setup in emit_texture_gen4()).
---
src/mesa/drivers/dri/i965/brw_fs.cpp | 10 ++++++----
1 files changed, 6 insertions(+), 4 deletions(-)
diff --git a/src/mesa/drivers/dri/i965/brw_fs.cpp
b/src/mesa/drivers/dri/i965/brw_fs.cpp
index 0d520e2..126081b 100644
--- a/src/mesa/drivers/dri/i965/brw_fs.cpp
+++ b/src/mesa/drivers/dri/i965/brw_fs.cpp
@@ -2453,11 +2453,8 @@ fs_visitor::generate_tex(fs_inst *inst, struct brw_reg
dst, struct brw_reg src)
int rlen = 4;
uint32_t simd_mode = BRW_SAMPLER_SIMD_MODE_SIMD8;
- if (c->dispatch_width == 16) {
- rlen = 8;
- dst = vec16(dst);
+ if (c->dispatch_width == 16)
simd_mode = BRW_SAMPLER_SIMD_MODE_SIMD16;
- }
if (intel->gen >= 5) {
switch (inst->opcode) {
@@ -2526,6 +2523,11 @@ fs_visitor::generate_tex(fs_inst *inst, struct brw_reg
dst, struct brw_reg src)
}
assert(msg_type != -1);
+ if (simd_mode == BRW_SAMPLER_SIMD_MODE_SIMD16) {
+ rlen = 8;
+ dst = vec16(dst);
+ }
+
brw_SAMPLE(p,
retype(dst, BRW_REGISTER_TYPE_UW),
inst->base_mrf,
--
1.7.5.1
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