It turns out there's nothing in the hardware preventing this, it was
just the lame backend we used to have.
Improves glbenchmark Egypt framerate 4.4% +/- 0.3% (n=3), and Pro by
2.6% +/- 0.6% (n=3).
---
src/mesa/drivers/dri/i965/brw_eu_emit.c | 6 +++++-
src/mesa/drivers/dri/i965/brw_fs.cpp | 9 ++++-----
2 files changed, 9 insertions(+), 6 deletions(-)
diff --git a/src/mesa/drivers/dri/i965/brw_eu_emit.c
b/src/mesa/drivers/dri/i965/brw_eu_emit.c
index 859068e..afa1982 100644
--- a/src/mesa/drivers/dri/i965/brw_eu_emit.c
+++ b/src/mesa/drivers/dri/i965/brw_eu_emit.c
@@ -913,7 +913,11 @@ gen6_IF(struct brw_compile *p, uint32_t conditional,
insn = next_insn(p, BRW_OPCODE_IF);
brw_set_dest(p, insn, brw_imm_w(0));
- insn->header.execution_size = BRW_EXECUTE_8;
+ if (p->compressed) {
+ insn->header.execution_size = BRW_EXECUTE_16;
+ } else {
+ insn->header.execution_size = BRW_EXECUTE_8;
+ }
insn->bits1.branch_gen6.jump_count = 0;
brw_set_src0(insn, src0);
brw_set_src1(insn, src1);
diff --git a/src/mesa/drivers/dri/i965/brw_fs.cpp
b/src/mesa/drivers/dri/i965/brw_fs.cpp
index 7db1314..ef51369 100644
--- a/src/mesa/drivers/dri/i965/brw_fs.cpp
+++ b/src/mesa/drivers/dri/i965/brw_fs.cpp
@@ -1797,10 +1797,6 @@ fs_visitor::visit(ir_if *ir)
{
fs_inst *inst;
- if (c->dispatch_width == 16) {
- fail("Can't support (non-uniform) control flow on 16-wide\n");
- }
-
/* Don't point the annotation at the if statement, because then it plus
* the then and else blocks get printed.
*/
@@ -3803,8 +3799,11 @@ fs_visitor::generate_code()
assert(intel->gen >= 6);
if_stack[if_stack_depth] = gen6_IF(p, inst->conditional_mod,
src[0], src[1]);
} else {
- if_stack[if_stack_depth] = brw_IF(p, BRW_EXECUTE_8);
+ if_stack[if_stack_depth] = brw_IF(p, c->dispatch_width == 16 ?
+ BRW_EXECUTE_16 :
+ BRW_EXECUTE_8);
}
+
if_depth_in_loop[loop_stack_depth]++;
if_stack_depth++;
if (if_stack_array_size <= if_stack_depth) {
--
1.7.5.1
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