Changes in directory llvm/lib/Target/ARM:
ARMISelDAGToDAG.cpp updated: 1.57 -> 1.58
ARMInstrInfo.td updated: 1.35 -> 1.36
---
Log message:
implement FUITOS and FUITOD
---
Diffs of the changes: (+31 -1)
ARMISelDAGToDAG.cpp | 22 ++++++++++++++++++++++
ARMInstrInfo.td | 10 +++++++++-
2 files changed, 31 insertions(+), 1 deletion(-)
Index: llvm/lib/Target/ARM/ARMISelDAGToDAG.cpp
diff -u llvm/lib/Target/ARM/ARMISelDAGToDAG.cpp:1.57
llvm/lib/Target/ARM/ARMISelDAGToDAG.cpp:1.58
--- llvm/lib/Target/ARM/ARMISelDAGToDAG.cpp:1.57 Fri Oct 6 15:33:26 2006
+++ llvm/lib/Target/ARM/ARMISelDAGToDAG.cpp Sat Oct 7 09:24:52 2006
@@ -49,6 +49,8 @@
setOperationAction(ISD::SINT_TO_FP, MVT::i32, Custom);
+ setOperationAction(ISD::UINT_TO_FP, MVT::i32, Custom);
+
setOperationAction(ISD::RET, MVT::Other, Custom);
setOperationAction(ISD::GlobalAddress, MVT::i32, Custom);
setOperationAction(ISD::ConstantPool, MVT::i32, Custom);
@@ -88,6 +90,10 @@
FSITOD,
+ FUITOS,
+
+ FUITOD,
+
FMRRD,
FMDRR
@@ -124,6 +130,8 @@
case ARMISD::BR: return "ARMISD::BR";
case ARMISD::FSITOS: return "ARMISD::FSITOS";
case ARMISD::FSITOD: return "ARMISD::FSITOD";
+ case ARMISD::FUITOS: return "ARMISD::FUITOS";
+ case ARMISD::FUITOD: return "ARMISD::FUITOD";
case ARMISD::FMRRD: return "ARMISD::FMRRD";
case ARMISD::FMDRR: return "ARMISD::FMDRR";
}
@@ -545,6 +553,18 @@
return DAG.getNode(op, vt, Tmp);
}
+static SDOperand LowerUINT_TO_FP(SDOperand Op, SelectionDAG &DAG) {
+ SDOperand IntVal = Op.getOperand(0);
+ assert(IntVal.getValueType() == MVT::i32);
+ MVT::ValueType vt = Op.getValueType();
+ assert(vt == MVT::f32 ||
+ vt == MVT::f64);
+
+ SDOperand Tmp = DAG.getNode(ISD::BIT_CONVERT, MVT::f32, IntVal);
+ ARMISD::NodeType op = vt == MVT::f32 ? ARMISD::FUITOS : ARMISD::FUITOD;
+ return DAG.getNode(op, vt, Tmp);
+}
+
SDOperand ARMTargetLowering::LowerOperation(SDOperand Op, SelectionDAG &DAG) {
switch (Op.getOpcode()) {
default:
@@ -556,6 +576,8 @@
return LowerGlobalAddress(Op, DAG);
case ISD::SINT_TO_FP:
return LowerSINT_TO_FP(Op, DAG);
+ case ISD::UINT_TO_FP:
+ return LowerUINT_TO_FP(Op, DAG);
case ISD::FORMAL_ARGUMENTS:
return LowerFORMAL_ARGUMENTS(Op, DAG, VarArgsFrameIndex);
case ISD::CALL:
Index: llvm/lib/Target/ARM/ARMInstrInfo.td
diff -u llvm/lib/Target/ARM/ARMInstrInfo.td:1.35
llvm/lib/Target/ARM/ARMInstrInfo.td:1.36
--- llvm/lib/Target/ARM/ARMInstrInfo.td:1.35 Sat Oct 7 09:03:39 2006
+++ llvm/lib/Target/ARM/ARMInstrInfo.td Sat Oct 7 09:24:52 2006
@@ -74,8 +74,10 @@
def SDTVoidBinOp : SDTypeProfile<0, 2, [SDTCisSameAs<0, 1>]>;
def armcmp : SDNode<"ARMISD::CMP", SDTVoidBinOp, [SDNPOutFlag]>;
-def armfsitos : SDNode<"ARMISD::FSITOS", SDTUnaryOp>;
+def armfsitos : SDNode<"ARMISD::FSITOS", SDTUnaryOp>;
def armfsitod : SDNode<"ARMISD::FSITOD", SDTUnaryOp>;
+def armfuitos : SDNode<"ARMISD::FUITOS", SDTUnaryOp>;
+def armfuitod : SDNode<"ARMISD::FUITOD", SDTUnaryOp>;
def SDTarmfmrrd : SDTypeProfile<0, 3, [SDTCisInt<0>, SDTCisInt<1>,
SDTCisFP<2>]>;
def armfmrrd : SDNode<"ARMISD::FMRRD", SDTarmfmrrd,
@@ -184,6 +186,12 @@
def FSITOD : InstARM<(ops DFPRegs:$dst, FPRegs:$src),
"fsitod $dst, $src", [(set DFPRegs:$dst, (armfsitod
FPRegs:$src))]>;
+def FUITOS : InstARM<(ops FPRegs:$dst, FPRegs:$src),
+ "fuitos $dst, $src", [(set FPRegs:$dst, (armfuitos
FPRegs:$src))]>;
+
+def FUITOD : InstARM<(ops DFPRegs:$dst, FPRegs:$src),
+ "fuitod $dst, $src", [(set DFPRegs:$dst, (armfuitod
FPRegs:$src))]>;
+
// Floating Point Arithmetic
def FADDS : InstARM<(ops FPRegs:$dst, FPRegs:$a, FPRegs:$b),
_______________________________________________
llvm-commits mailing list
llvm-commits@cs.uiuc.edu
http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits
