Changes in directory llvm/lib/Target/ARM:
ARMISelDAGToDAG.cpp updated: 1.62 -> 1.63
ARMInstrInfo.td updated: 1.39 -> 1.40
---
Log message:
compare doubles
---
Diffs of the changes: (+6 -2)
ARMISelDAGToDAG.cpp | 4 ++--
ARMInstrInfo.td | 4 ++++
2 files changed, 6 insertions(+), 2 deletions(-)
Index: llvm/lib/Target/ARM/ARMISelDAGToDAG.cpp
diff -u llvm/lib/Target/ARM/ARMISelDAGToDAG.cpp:1.62
llvm/lib/Target/ARM/ARMISelDAGToDAG.cpp:1.63
--- llvm/lib/Target/ARM/ARMISelDAGToDAG.cpp:1.62 Tue Oct 10 07:56:00 2006
+++ llvm/lib/Target/ARM/ARMISelDAGToDAG.cpp Tue Oct 10 11:33:47 2006
@@ -539,10 +539,10 @@
static SDOperand GetCMP(ISD::CondCode CC, SDOperand LHS, SDOperand RHS,
SelectionDAG &DAG) {
MVT::ValueType vt = LHS.getValueType();
- assert(vt == MVT::i32 || vt == MVT::f32);
+ assert(vt == MVT::i32 || vt == MVT::f32 || vt == MVT::f64);
//Note: unordered floating point compares should use a non throwing
//compare.
- bool isUnorderedFloat = vt == MVT::f32 &&
+ bool isUnorderedFloat = (vt == MVT::f32 || vt == MVT::f64) &&
(CC >= ISD::SETUO && CC <= ISD::SETUNE);
assert(!isUnorderedFloat && "Unordered float compares are not supported");
Index: llvm/lib/Target/ARM/ARMInstrInfo.td
diff -u llvm/lib/Target/ARM/ARMInstrInfo.td:1.39
llvm/lib/Target/ARM/ARMInstrInfo.td:1.40
--- llvm/lib/Target/ARM/ARMInstrInfo.td:1.39 Tue Oct 10 07:56:00 2006
+++ llvm/lib/Target/ARM/ARMInstrInfo.td Tue Oct 10 11:33:47 2006
@@ -178,6 +178,10 @@
"fcmpes $a, $b",
[(armcmp FPRegs:$a, FPRegs:$b)]>;
+def fcmped : InstARM<(ops DFPRegs:$a, DFPRegs:$b),
+ "fcmped $a, $b",
+ [(armcmp DFPRegs:$a, DFPRegs:$b)]>;
+
// Floating Point Conversion
// We use bitconvert for moving the data between the register classes.
// The format conversion is done with ARM specific nodes
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