Changes in directory llvm/lib/Target/ARM:
ARMISelDAGToDAG.cpp updated: 1.88 -> 1.89
ARMInstrInfo.td updated: 1.77 -> 1.78
---
Log message:
use MVN to handle small negative constants
---
Diffs of the changes: (+32 -0)
ARMISelDAGToDAG.cpp | 21 +++++++++++++++++++++
ARMInstrInfo.td | 11 +++++++++++
2 files changed, 32 insertions(+)
Index: llvm/lib/Target/ARM/ARMISelDAGToDAG.cpp
diff -u llvm/lib/Target/ARM/ARMISelDAGToDAG.cpp:1.88
llvm/lib/Target/ARM/ARMISelDAGToDAG.cpp:1.89
--- llvm/lib/Target/ARM/ARMISelDAGToDAG.cpp:1.88 Thu Dec 7 16:21:48 2006
+++ llvm/lib/Target/ARM/ARMISelDAGToDAG.cpp Mon Dec 11 19:03:11 2006
@@ -781,6 +781,8 @@
virtual void InstructionSelectBasicBlock(SelectionDAG &DAG);
bool SelectAddrMode1(SDOperand Op, SDOperand N, SDOperand &Arg,
SDOperand &Shift, SDOperand &ShiftType);
+ bool SelectAddrMode1a(SDOperand Op, SDOperand N, SDOperand &Arg,
+ SDOperand &Shift, SDOperand &ShiftType);
bool SelectAddrMode2(SDOperand Op, SDOperand N, SDOperand &Arg,
SDOperand &Offset);
bool SelectAddrMode5(SDOperand Op, SDOperand N, SDOperand &Arg,
@@ -883,6 +885,25 @@
return true;
}
+bool ARMDAGToDAGISel::SelectAddrMode1a(SDOperand Op,
+ SDOperand N,
+ SDOperand &Arg,
+ SDOperand &Shift,
+ SDOperand &ShiftType) {
+ if (N.getOpcode() != ISD::Constant)
+ return false;
+
+ uint32_t val = ~cast<ConstantSDNode>(N)->getValue();
+ if(!isRotInt8Immediate(val))
+ return false;
+
+ Arg = CurDAG->getTargetConstant(val, MVT::i32);
+ Shift = CurDAG->getTargetConstant(0, MVT::i32);
+ ShiftType = CurDAG->getTargetConstant(ARMShift::LSL, MVT::i32);
+
+ return true;
+}
+
bool ARMDAGToDAGISel::SelectAddrMode2(SDOperand Op, SDOperand N,
SDOperand &Arg, SDOperand &Offset) {
//TODO: complete and cleanup!
Index: llvm/lib/Target/ARM/ARMInstrInfo.td
diff -u llvm/lib/Target/ARM/ARMInstrInfo.td:1.77
llvm/lib/Target/ARM/ARMInstrInfo.td:1.78
--- llvm/lib/Target/ARM/ARMInstrInfo.td:1.77 Mon Dec 11 18:37:38 2006
+++ llvm/lib/Target/ARM/ARMInstrInfo.td Mon Dec 11 19:03:11 2006
@@ -18,6 +18,11 @@
let MIOperandInfo = (ops ptr_rc, ptr_rc, i32imm);
}
+def op_addr_mode1a : Operand<iPTR> {
+ let PrintMethod = "printAddrMode1";
+ let MIOperandInfo = (ops ptr_rc, ptr_rc, i32imm);
+}
+
def op_addr_mode2 : Operand<iPTR> {
let PrintMethod = "printAddrMode2";
let MIOperandInfo = (ops ptr_rc, i32imm);
@@ -33,6 +38,9 @@
def addr_mode1 : ComplexPattern<iPTR, 3, "SelectAddrMode1", [imm, sra, shl,
srl],
[]>;
+//Addressing Mode 1a: MVN hack
+def addr_mode1a : ComplexPattern<iPTR, 3, "SelectAddrMode1a", [imm], []>;
+
//Addressing Mode 2: Load and Store Word or Unsigned Byte
def addr_mode2 : ComplexPattern<iPTR, 2, "SelectAddrMode2", [], []>;
@@ -193,6 +201,9 @@
def MVN : InstARM<(ops IntRegs:$dst, op_addr_mode1:$src),
"mvn $dst, $src", [(set IntRegs:$dst, (not
addr_mode1:$src))]>;
+def MVN2 : InstARM<(ops IntRegs:$dst, op_addr_mode1:$src),
+ "mvn $dst, $src", [(set IntRegs:$dst,
addr_mode1a:$src)]>;
+
def ADD : Addr1BinOp<"add", add>;
def ADCS : Addr1BinOp<"adcs", adde>;
def ADDS : Addr1BinOp<"adds", addc>;
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