Changes in directory llvm/lib/Target/PowerPC:
PPCISelLowering.cpp updated: 1.84 -> 1.85 PPCISelLowering.h updated: 1.19 -> 1.20 --- Log message: Add the simple PPC integer constraints --- Diffs of the changes: (+42 -1) PPCISelLowering.cpp | 41 +++++++++++++++++++++++++++++++++++++++++ PPCISelLowering.h | 2 +- 2 files changed, 42 insertions(+), 1 deletion(-) Index: llvm/lib/Target/PowerPC/PPCISelLowering.cpp diff -u llvm/lib/Target/PowerPC/PPCISelLowering.cpp:1.84 llvm/lib/Target/PowerPC/PPCISelLowering.cpp:1.85 --- llvm/lib/Target/PowerPC/PPCISelLowering.cpp:1.84 Wed Feb 1 01:19:44 2006 +++ llvm/lib/Target/PowerPC/PPCISelLowering.cpp Mon Feb 6 18:47:13 2006 @@ -1035,3 +1035,44 @@ // Handle explicit register names. return TargetLowering::getRegForInlineAsmConstraint(Constraint); } + +// isOperandValidForConstraint +bool PPCTargetLowering:: +isOperandValidForConstraint(SDOperand Op, char Letter) { + switch (Letter) { + default: break; + case 'I': + case 'J': + case 'K': + case 'L': + case 'M': + case 'N': + case 'O': + case 'P': { + if (!isa<ConstantSDNode>(Op)) return false; // Must be an immediate. + unsigned Value = cast<ConstantSDNode>(Op)->getValue(); + switch (Letter) { + default: assert(0 && "Unknown constraint letter!"); + case 'I': // "I" is a signed 16-bit constant. + return (short)Value == (int)Value; + case 'J': // "J" is a constant with only the high-order 16 bits nonzero. + case 'L': // "L" is a signed 16-bit constant shifted left 16 bits. + return (short)Value == 0; + case 'K': // "K" is a constant with only the low-order 16 bits nonzero. + return (Value >> 16) == 0; + case 'M': // "M" is a constant that is greater than 31. + return Value > 31; + case 'N': // "N" is a positive constant that is an exact power of two. + return (int)Value > 0 && isPowerOf2_32(Value); + case 'O': // "O" is the constant zero. + return Value == 0; + case 'P': // "P" is a constant whose negation is a signed 16-bit constant. + return (short)-Value == (int)-Value; + } + break; + } + } + + // Handle standard constraint letters. + return TargetLowering::isOperandValidForConstraint(Op, Letter); +} Index: llvm/lib/Target/PowerPC/PPCISelLowering.h diff -u llvm/lib/Target/PowerPC/PPCISelLowering.h:1.19 llvm/lib/Target/PowerPC/PPCISelLowering.h:1.20 --- llvm/lib/Target/PowerPC/PPCISelLowering.h:1.19 Tue Jan 31 13:20:21 2006 +++ llvm/lib/Target/PowerPC/PPCISelLowering.h Mon Feb 6 18:47:13 2006 @@ -99,7 +99,7 @@ std::vector<unsigned> getRegForInlineAsmConstraint(const std::string &Constraint) const; - + bool isOperandValidForConstraint(SDOperand Op, char ConstraintLetter); }; } _______________________________________________ llvm-commits mailing list llvm-commits@cs.uiuc.edu http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits