Changes in directory llvm/lib/Target/X86:
X86ATTAsmPrinter.cpp updated: 1.20 -> 1.21 X86ATTAsmPrinter.h updated: 1.5 -> 1.6 X86InstrInfo.td updated: 1.230 -> 1.231 X86IntelAsmPrinter.cpp updated: 1.14 -> 1.15 X86IntelAsmPrinter.h updated: 1.6 -> 1.7 --- Log message: Eliminate the printCallOperand method, using a 'call' modifier on printOperand instead. --- Diffs of the changes: (+25 -32) X86ATTAsmPrinter.cpp | 17 +++++++++++------ X86ATTAsmPrinter.h | 11 +++-------- X86InstrInfo.td | 8 ++------ X86IntelAsmPrinter.cpp | 10 +++++----- X86IntelAsmPrinter.h | 11 ++++------- 5 files changed, 25 insertions(+), 32 deletions(-) Index: llvm/lib/Target/X86/X86ATTAsmPrinter.cpp diff -u llvm/lib/Target/X86/X86ATTAsmPrinter.cpp:1.20 llvm/lib/Target/X86/X86ATTAsmPrinter.cpp:1.21 --- llvm/lib/Target/X86/X86ATTAsmPrinter.cpp:1.20 Wed Jan 25 20:27:43 2006 +++ llvm/lib/Target/X86/X86ATTAsmPrinter.cpp Mon Feb 6 17:41:19 2006 @@ -63,7 +63,9 @@ return false; } -void X86ATTAsmPrinter::printOp(const MachineOperand &MO, bool isCallOp) { +void X86ATTAsmPrinter::printOperand(const MachineInstr *MI, unsigned OpNo, + const char *Modifier) { + const MachineOperand &MO = MI->getOperand(OpNo); const MRegisterInfo &RI = *TM.getRegisterInfo(); switch (MO.getType()) { case MachineOperand::MO_VirtualRegister: @@ -92,6 +94,7 @@ abort (); return; case MachineOperand::MO_GlobalAddress: { + bool isCallOp = Modifier && !strcmp(Modifier, "call"); // Darwin block shameless ripped from PowerPCAsmPrinter.cpp if (forDarwin) { if (!isCallOp) O << '$'; @@ -132,7 +135,8 @@ O << Offset; return; } - case MachineOperand::MO_ExternalSymbol: + case MachineOperand::MO_ExternalSymbol: { + bool isCallOp = Modifier && !strcmp(Modifier, "call"); if (isCallOp && forDarwin) { std::string Name(GlobalPrefix); Name += MO.getSymbolName(); FnStubs.insert(Name); @@ -142,6 +146,7 @@ if (!isCallOp) O << '$'; O << GlobalPrefix << MO.getSymbolName(); return; + } default: O << "<unknown operand type>"; return; } @@ -183,7 +188,7 @@ O << "+" << DispSpec.getImmedValue(); if (IndexReg.getReg()) { O << "(,"; - printOp(IndexReg); + printOperand(MI, Op+2); if (ScaleVal != 1) O << "," << ScaleVal; O << ")"; @@ -192,7 +197,7 @@ } if (DispSpec.isGlobalAddress()) { - printOp(DispSpec, true); + printOperand(MI, Op+3, "call"); } else { int DispVal = DispSpec.getImmedValue(); if (DispVal || (!IndexReg.getReg() && !BaseReg.getReg())) @@ -202,11 +207,11 @@ if (IndexReg.getReg() || BaseReg.getReg()) { O << "("; if (BaseReg.getReg()) - printOp(BaseReg); + printOperand(MI, Op); if (IndexReg.getReg()) { O << ","; - printOp(IndexReg); + printOperand(MI, Op+2); if (ScaleVal != 1) O << "," << ScaleVal; } Index: llvm/lib/Target/X86/X86ATTAsmPrinter.h diff -u llvm/lib/Target/X86/X86ATTAsmPrinter.h:1.5 llvm/lib/Target/X86/X86ATTAsmPrinter.h:1.6 --- llvm/lib/Target/X86/X86ATTAsmPrinter.h:1.5 Tue Jan 31 16:28:30 2006 +++ llvm/lib/Target/X86/X86ATTAsmPrinter.h Mon Feb 6 17:41:19 2006 @@ -34,13 +34,9 @@ /// returns false. bool printInstruction(const MachineInstr *MI); - // This method is used by the tablegen'erated instruction printer. - void printOperand(const MachineInstr *MI, unsigned OpNo){ - printOp(MI->getOperand(OpNo)); - } - void printCallOperand(const MachineInstr *MI, unsigned OpNo) { - printOp(MI->getOperand(OpNo), true); // Don't print '$' prefix. - } + // These methods are used by the tablegen'erated instruction printer. + void printOperand(const MachineInstr *MI, unsigned OpNo, + const char *Modifier = 0); void printi8mem(const MachineInstr *MI, unsigned OpNo) { printMemReference(MI, OpNo); } @@ -64,7 +60,6 @@ } void printMachineInstruction(const MachineInstr *MI); - void printOp(const MachineOperand &MO, bool isCallOperand = false); void printSSECC(const MachineInstr *MI, unsigned Op); void printMemReference(const MachineInstr *MI, unsigned Op); bool runOnMachineFunction(MachineFunction &F); Index: llvm/lib/Target/X86/X86InstrInfo.td diff -u llvm/lib/Target/X86/X86InstrInfo.td:1.230 llvm/lib/Target/X86/X86InstrInfo.td:1.231 --- llvm/lib/Target/X86/X86InstrInfo.td:1.230 Fri Feb 3 20:23:01 2006 +++ llvm/lib/Target/X86/X86InstrInfo.td Mon Feb 6 17:41:19 2006 @@ -159,10 +159,6 @@ // 32-bits but only 8 bits are significant. def i32i8imm : Operand<i32>; -// PCRelative calls need special operand formatting. -let PrintMethod = "printCallOperand" in - def calltarget : Operand<i32>; - // Branch targets have OtherVT type. def brtarget : Operand<OtherVT>; @@ -516,7 +512,7 @@ // All calls clobber the non-callee saved registers... let Defs = [EAX, ECX, EDX, FP0, FP1, FP2, FP3, FP4, FP5, FP6, ST0, XMM0, XMM1, XMM2, XMM3, XMM4, XMM5, XMM6, XMM7] in { - def CALLpcrel32 : I<0xE8, RawFrm, (ops calltarget:$dst), "call $dst", + def CALLpcrel32 : I<0xE8, RawFrm, (ops i32imm:$dst), "call ${dst:call}", []>; def CALL32r : I<0xFF, MRM2r, (ops R32:$dst), "call {*}$dst", [(X86call R32:$dst)]>; @@ -526,7 +522,7 @@ // Tail call stuff. let isCall = 1, isTerminator = 1, isReturn = 1, isBarrier = 1, noResults = 1 in - def TAILJMPd : IBr<0xE9, (ops calltarget:$dst), "jmp $dst # TAIL CALL", []>; + def TAILJMPd : IBr<0xE9, (ops i32imm:$dst), "jmp ${dst:call} # TAIL CALL", []>; let isCall = 1, isTerminator = 1, isReturn = 1, isBarrier = 1, noResults = 1 in def TAILJMPr : I<0xFF, MRM4r, (ops R32:$dst), "jmp {*}$dst # TAIL CALL", []>; let isCall = 1, isTerminator = 1, isReturn = 1, isBarrier = 1, noResults = 1 in Index: llvm/lib/Target/X86/X86IntelAsmPrinter.cpp diff -u llvm/lib/Target/X86/X86IntelAsmPrinter.cpp:1.14 llvm/lib/Target/X86/X86IntelAsmPrinter.cpp:1.15 --- llvm/lib/Target/X86/X86IntelAsmPrinter.cpp:1.14 Sun Jan 22 17:37:17 2006 +++ llvm/lib/Target/X86/X86IntelAsmPrinter.cpp Mon Feb 6 17:41:19 2006 @@ -74,8 +74,8 @@ } } -void X86IntelAsmPrinter::printOp(const MachineOperand &MO, - bool elideOffsetKeyword /* = false */) { +void X86IntelAsmPrinter::printOp(const MachineOperand &MO, + const char *Modifier) { const MRegisterInfo &RI = *TM.getRegisterInfo(); switch (MO.getType()) { case MachineOperand::MO_VirtualRegister: @@ -109,7 +109,7 @@ abort (); return; case MachineOperand::MO_GlobalAddress: { - if (!elideOffsetKeyword) + if (!Modifier || strcmp(Modifier, "call")) O << "OFFSET "; O << Mang->getValueName(MO.getGlobal()); int Offset = MO.getOffset(); @@ -161,7 +161,7 @@ O << "["; bool NeedPlus = false; if (BaseReg.getReg()) { - printOp(BaseReg, true); + printOp(BaseReg, "call"); NeedPlus = true; } @@ -176,7 +176,7 @@ if (DispSpec.isGlobalAddress()) { if (NeedPlus) O << " + "; - printOp(DispSpec, true); + printOp(DispSpec, "call"); } else { int DispVal = DispSpec.getImmedValue(); if (DispVal || (!BaseReg.getReg() && !IndexReg.getReg())) { Index: llvm/lib/Target/X86/X86IntelAsmPrinter.h diff -u llvm/lib/Target/X86/X86IntelAsmPrinter.h:1.6 llvm/lib/Target/X86/X86IntelAsmPrinter.h:1.7 --- llvm/lib/Target/X86/X86IntelAsmPrinter.h:1.6 Tue Jan 31 16:28:30 2006 +++ llvm/lib/Target/X86/X86IntelAsmPrinter.h Mon Feb 6 17:41:19 2006 @@ -37,21 +37,18 @@ bool printInstruction(const MachineInstr *MI); // This method is used by the tablegen'erated instruction printer. - void printOperand(const MachineInstr *MI, unsigned OpNo){ + void printOperand(const MachineInstr *MI, unsigned OpNo, + const char *Modifier = 0) { const MachineOperand &MO = MI->getOperand(OpNo); if (MO.getType() == MachineOperand::MO_MachineRegister) { assert(MRegisterInfo::isPhysicalRegister(MO.getReg())&&"Not physref??"); // Bug Workaround: See note in Printer::doInitialization about %. O << "%" << TM.getRegisterInfo()->get(MO.getReg()).Name; } else { - printOp(MO); + printOp(MO, Modifier); } } - void printCallOperand(const MachineInstr *MI, unsigned OpNo) { - printOp(MI->getOperand(OpNo), true); // Don't print "OFFSET". - } - void printi8mem(const MachineInstr *MI, unsigned OpNo) { O << "BYTE PTR "; printMemReference(MI, OpNo); @@ -82,7 +79,7 @@ } void printMachineInstruction(const MachineInstr *MI); - void printOp(const MachineOperand &MO, bool elideOffsetKeyword = false); + void printOp(const MachineOperand &MO, const char *Modifier = 0); void printSSECC(const MachineInstr *MI, unsigned Op); void printMemReference(const MachineInstr *MI, unsigned Op); bool runOnMachineFunction(MachineFunction &F); _______________________________________________ llvm-commits mailing list llvm-commits@cs.uiuc.edu http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits